JPS61176828U - - Google Patents

Info

Publication number
JPS61176828U
JPS61176828U JP5830285U JP5830285U JPS61176828U JP S61176828 U JPS61176828 U JP S61176828U JP 5830285 U JP5830285 U JP 5830285U JP 5830285 U JP5830285 U JP 5830285U JP S61176828 U JPS61176828 U JP S61176828U
Authority
JP
Japan
Prior art keywords
type mos
inverter
input terminal
mos transistor
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5830285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5830285U priority Critical patent/JPS61176828U/ja
Publication of JPS61176828U publication Critical patent/JPS61176828U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図、第2図は
出力電圧の立上り特性を示す図、第3図は従来例
である。 1……入力端子、2……インバータ、3,6…
…N型MOSトランジスタ、4……P型MOSト
ランジスタ、5……出力端子。
FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the rise characteristics of the output voltage, and FIG. 3 is a conventional example. 1...Input terminal, 2...Inverter, 3, 6...
...N-type MOS transistor, 4...P-type MOS transistor, 5...output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] P型・N型MOSトランジスタからなるCMO
Sインバータの両者のゲート結合端子と入力端子
との間にインバータを設けるとともに、前記P型
MOSトランジスタと並列に第2のN型MOSト
ランジスタを接続し、そのゲートが入力端子と接
続されていることを特徴とする出力バツフア回路
CMO consisting of P-type and N-type MOS transistors
An inverter is provided between both gate coupling terminals of the S inverter and the input terminal, and a second N-type MOS transistor is connected in parallel with the P-type MOS transistor, and its gate is connected to the input terminal. An output buffer circuit featuring:
JP5830285U 1985-04-19 1985-04-19 Pending JPS61176828U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5830285U JPS61176828U (en) 1985-04-19 1985-04-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5830285U JPS61176828U (en) 1985-04-19 1985-04-19

Publications (1)

Publication Number Publication Date
JPS61176828U true JPS61176828U (en) 1986-11-05

Family

ID=30583678

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5830285U Pending JPS61176828U (en) 1985-04-19 1985-04-19

Country Status (1)

Country Link
JP (1) JPS61176828U (en)

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