JPH0158668B2 - - Google Patents
Info
- Publication number
- JPH0158668B2 JPH0158668B2 JP56005236A JP523681A JPH0158668B2 JP H0158668 B2 JPH0158668 B2 JP H0158668B2 JP 56005236 A JP56005236 A JP 56005236A JP 523681 A JP523681 A JP 523681A JP H0158668 B2 JPH0158668 B2 JP H0158668B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- region
- base
- emitter
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
- H10D10/441—Vertical BJTs having an emitter-base junction ending at a main surface of the body and a base-collector junction ending at a lateral surface of the body
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/131—Reactive ion etching rie
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/126,611 US4338138A (en) | 1980-03-03 | 1980-03-03 | Process for fabricating a bipolar transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56126961A JPS56126961A (en) | 1981-10-05 |
JPH0158668B2 true JPH0158668B2 (en, 2012) | 1989-12-13 |
Family
ID=22425788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP523681A Granted JPS56126961A (en) | 1980-03-03 | 1981-01-19 | Semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4338138A (en, 2012) |
EP (1) | EP0035111B1 (en, 2012) |
JP (1) | JPS56126961A (en, 2012) |
DE (1) | DE3172466D1 (en, 2012) |
Families Citing this family (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4378630A (en) * | 1980-05-05 | 1983-04-05 | International Business Machines Corporation | Process for fabricating a high performance PNP and NPN structure |
US4419150A (en) * | 1980-12-29 | 1983-12-06 | Rockwell International Corporation | Method of forming lateral bipolar transistors |
JPS57149770A (en) * | 1981-03-11 | 1982-09-16 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
US4433470A (en) | 1981-05-19 | 1984-02-28 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing semiconductor device utilizing selective etching and diffusion |
JPS57197833A (en) * | 1981-05-29 | 1982-12-04 | Nec Corp | Semiconductor device |
JPS5835970A (ja) * | 1981-08-28 | 1983-03-02 | Fujitsu Ltd | 半導体装置の製造方法 |
US4491486A (en) * | 1981-09-17 | 1985-01-01 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
JPS5873156A (ja) * | 1981-10-28 | 1983-05-02 | Hitachi Ltd | 半導体装置 |
JPS5875870A (ja) * | 1981-10-30 | 1983-05-07 | Hitachi Ltd | 半導体装置 |
US4385975A (en) * | 1981-12-30 | 1983-05-31 | International Business Machines Corp. | Method of forming wide, deep dielectric filled isolation trenches in the surface of a silicon semiconductor substrate |
JPS58201362A (ja) * | 1982-05-20 | 1983-11-24 | Toshiba Corp | 半導体装置の製造方法 |
JPS58210634A (ja) * | 1982-05-31 | 1983-12-07 | Toshiba Corp | 半導体装置の製造方法 |
FR2529714A1 (fr) * | 1982-07-01 | 1984-01-06 | Commissariat Energie Atomique | Procede de realisation de l'oxyde de champ d'un circuit integre |
JPS5940571A (ja) * | 1982-08-30 | 1984-03-06 | Hitachi Ltd | 半導体装置 |
US4819054A (en) * | 1982-09-29 | 1989-04-04 | Hitachi, Ltd. | Semiconductor IC with dual groove isolation |
US4521952A (en) * | 1982-12-02 | 1985-06-11 | International Business Machines Corporation | Method of making integrated circuits using metal silicide contacts |
JPS6054450A (ja) * | 1983-09-05 | 1985-03-28 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
EP0147249B1 (en) * | 1983-09-19 | 1989-01-18 | Fairchild Semiconductor Corporation | Method of manufacturing transistor structures having junctions bound by insulating layers, and resulting structures |
JPH0618198B2 (ja) * | 1984-02-15 | 1994-03-09 | 株式会社日立製作所 | 半導体装置 |
DE3564518D1 (en) * | 1984-09-29 | 1988-09-22 | Toshiba Kk | Heterojunction bipolar transistor and method of manufacturing the same |
JPH0638478B2 (ja) * | 1984-10-22 | 1994-05-18 | 株式会社日立製作所 | 半導体装置 |
JP2532384B2 (ja) * | 1985-01-30 | 1996-09-11 | テキサス インスツルメンツ インコ−ポレイテツド | バイポ−ラ・トランジスタとその製法 |
US4703554A (en) * | 1985-04-04 | 1987-11-03 | Texas Instruments Incorporated | Technique for fabricating a sidewall base contact with extrinsic base-on-insulator |
NL8503408A (nl) * | 1985-12-11 | 1987-07-01 | Philips Nv | Hoogfrequenttransistor en werkwijze ter vervaardiging daarvan. |
US4860085A (en) * | 1986-06-06 | 1989-08-22 | American Telephone And Telegraph Company, At&T Bell Laboratories | Submicron bipolar transistor with buried silicide region |
CA1298921C (en) * | 1986-07-02 | 1992-04-14 | Madhukar B. Vora | Bipolar transistor with polysilicon stringer base contact |
US4782030A (en) * | 1986-07-09 | 1988-11-01 | Kabushiki Kaisha Toshiba | Method of manufacturing bipolar semiconductor device |
GB8621534D0 (en) * | 1986-09-08 | 1986-10-15 | British Telecomm | Bipolar fabrication process |
JPS6379373A (ja) * | 1986-09-24 | 1988-04-09 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPS6381855A (ja) * | 1986-09-25 | 1988-04-12 | Mitsubishi Electric Corp | ヘテロ接合バイポ−ラトランジスタの製造方法 |
NL8700640A (nl) * | 1987-03-18 | 1988-10-17 | Philips Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan. |
US4738624A (en) * | 1987-04-13 | 1988-04-19 | International Business Machines Corporation | Bipolar transistor structure with self-aligned device and isolation and fabrication process therefor |
US4847670A (en) * | 1987-05-11 | 1989-07-11 | International Business Machines Corporation | High performance sidewall emitter transistor |
US4916083A (en) * | 1987-05-11 | 1990-04-10 | International Business Machines Corporation | High performance sidewall emitter transistor |
US4818713A (en) * | 1987-10-20 | 1989-04-04 | American Telephone And Telegraph Company, At&T Bell Laboratories | Techniques useful in fabricating semiconductor devices having submicron features |
NL8800157A (nl) * | 1988-01-25 | 1989-08-16 | Philips Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan. |
US4946798A (en) * | 1988-02-09 | 1990-08-07 | Oki Electric Industry Co., Ltd. | Semiconductor integrated circuit fabrication method |
US4927774A (en) * | 1988-06-10 | 1990-05-22 | British Telecommunications Plc | Self aligned bipolar fabrication process |
JPH0290617A (ja) * | 1988-09-28 | 1990-03-30 | Nec Corp | 半導体装置の製造方法 |
GB2230134A (en) * | 1989-04-05 | 1990-10-10 | Philips Nv | A method of manufacturing a semiconductor device |
DE58909837D1 (de) * | 1989-09-22 | 1998-09-17 | Siemens Ag | Verfahren zur Herstellung eines Bipolartransistors mit verminderter Basis/Kollektor-Kapazität |
DE59108607D1 (de) * | 1990-09-20 | 1997-04-17 | Siemens Ag | Bipolartransistor für hohe Leistung im Mikrowellenlängenbereich |
US5631495A (en) * | 1994-11-29 | 1997-05-20 | International Business Machines Corporation | High performance bipolar devices with plurality of base contact regions formed around the emitter layer |
FR2756100B1 (fr) * | 1996-11-19 | 1999-02-12 | Sgs Thomson Microelectronics | Transistor bipolaire a emetteur inhomogene dans un circuit integre bicmos |
FR2756103B1 (fr) * | 1996-11-19 | 1999-05-14 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos et d'un condensateur |
FR2756974B1 (fr) | 1996-12-10 | 1999-06-04 | Sgs Thomson Microelectronics | Transistor bipolaire a isolement par caisson |
US5814547A (en) * | 1997-10-06 | 1998-09-29 | Industrial Technology Research Institute | Forming different depth trenches simultaneously by microloading effect |
JP2001308106A (ja) * | 2000-04-27 | 2001-11-02 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6617220B2 (en) | 2001-03-16 | 2003-09-09 | International Business Machines Corporation | Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base |
WO2004095564A1 (en) * | 2003-04-24 | 2004-11-04 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device with a bipolar transistor |
GB0507157D0 (en) * | 2005-04-08 | 2005-05-18 | Ami Semiconductor Belgium Bvba | Double trench for isolation of semiconductor devices |
US8932931B2 (en) | 2012-02-13 | 2015-01-13 | International Business Machines Corporation | Self-aligned emitter-base region |
US10593771B2 (en) * | 2017-12-11 | 2020-03-17 | International Business Machines Corporation | Vertical fin-type bipolar junction transistor with self-aligned base contact |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3655457A (en) * | 1968-08-06 | 1972-04-11 | Ibm | Method of making or modifying a pn-junction by ion implantation |
US3574008A (en) * | 1968-08-19 | 1971-04-06 | Trw Semiconductors Inc | Mushroom epitaxial growth in tier-type shaped holes |
US3796613A (en) * | 1971-06-18 | 1974-03-12 | Ibm | Method of forming dielectric isolation for high density pedestal semiconductor devices |
US3975221A (en) * | 1973-08-29 | 1976-08-17 | American Micro-Systems, Inc. | Low capacitance V groove MOS NOR gate and method of manufacture |
JPS51128269A (en) * | 1975-04-30 | 1976-11-09 | Sony Corp | Semiconductor unit |
US4048649A (en) * | 1976-02-06 | 1977-09-13 | Transitron Electronic Corporation | Superintegrated v-groove isolated bipolar and vmos transistors |
JPS52103971A (en) * | 1976-02-26 | 1977-08-31 | Nec Corp | Semiconductor device |
US4047217A (en) * | 1976-04-12 | 1977-09-06 | Fairchild Camera And Instrument Corporation | High-gain, high-voltage transistor for linear integrated circuits |
JPS5328384A (en) * | 1976-08-27 | 1978-03-16 | Fujitsu Ltd | Production method of semiconductor device |
US4115797A (en) * | 1976-10-04 | 1978-09-19 | Fairchild Camera And Instrument Corporation | Integrated injection logic with heavily doped injector base self-aligned with injector emitter and collector |
US4104086A (en) * | 1977-08-15 | 1978-08-01 | International Business Machines Corporation | Method for forming isolated regions of silicon utilizing reactive ion etching |
US4139442A (en) * | 1977-09-13 | 1979-02-13 | International Business Machines Corporation | Reactive ion etching method for producing deep dielectric isolation in silicon |
JPS54128683A (en) * | 1978-03-27 | 1979-10-05 | Ibm | Method of fabricating emitterrbase matching bipolar transistor |
US4157269A (en) * | 1978-06-06 | 1979-06-05 | International Business Machines Corporation | Utilizing polysilicon diffusion sources and special masking techniques |
US4242791A (en) * | 1979-09-21 | 1981-01-06 | International Business Machines Corporation | High performance bipolar transistors fabricated by post emitter base implantation process |
JPS5667765U (en, 2012) * | 1979-10-29 | 1981-06-05 | ||
US4252582A (en) * | 1980-01-25 | 1981-02-24 | International Business Machines Corporation | Self aligned method for making bipolar transistor having minimum base to emitter contact spacing |
JPS625349A (ja) * | 1985-07-02 | 1987-01-12 | 株式会社新素材総合研究所 | 液体容器 |
-
1980
- 1980-03-03 US US06/126,611 patent/US4338138A/en not_active Expired - Lifetime
-
1981
- 1981-01-19 JP JP523681A patent/JPS56126961A/ja active Granted
- 1981-01-23 EP EP81100493A patent/EP0035111B1/en not_active Expired
- 1981-01-23 DE DE8181100493T patent/DE3172466D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE3172466D1 (en) | 1985-11-07 |
JPS56126961A (en) | 1981-10-05 |
EP0035111A3 (en) | 1982-08-25 |
EP0035111B1 (en) | 1985-10-02 |
US4338138A (en) | 1982-07-06 |
EP0035111A2 (en) | 1981-09-09 |
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