JPH01179446U - - Google Patents
Info
- Publication number
- JPH01179446U JPH01179446U JP7589488U JP7589488U JPH01179446U JP H01179446 U JPH01179446 U JP H01179446U JP 7589488 U JP7589488 U JP 7589488U JP 7589488 U JP7589488 U JP 7589488U JP H01179446 U JPH01179446 U JP H01179446U
- Authority
- JP
- Japan
- Prior art keywords
- lead terminal
- wiring board
- printed wiring
- semiconductor package
- chip carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 2
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案の一実施例によるリードレスチ
ツプキヤリヤパツケージを示す裏面斜視図、第２
図は本実施例によるリードレスチツプキヤリヤパ
ツケージの実装を示す断面図、第３図は従来のリ
ードレスチツプキヤリヤパツケージを示す斜視図
、第４図は従来のリードレスチツプキヤリヤパツ
ケージ実装を示す断面図である。
図において、２は基板、２−１は接続パターン
、３は半田、１１−１は接合面、１１−２はリー
ド端子、１１−３は突起、を示す。
FIG. 1 is a rear perspective view showing a leadless chip carrier package according to an embodiment of the present invention;
The figure is a cross-sectional view showing the implementation of the leadless chip carrier package according to this embodiment, FIG. 3 is a perspective view showing the conventional leadless chip carrier package, and FIG. 4 is the conventional leadless chip carrier package implementation. FIG. In the figure, 2 is a substrate, 2-1 is a connection pattern, 3 is solder, 11-1 is a bonding surface, 11-2 is a lead terminal, and 11-3 is a protrusion.
Claims (1)
ージであつて、該半導体パツケージのリード端子
１１−２を形成した接合面１１−１に、上記プリ
ント配線基板２の接続パターン２−１と該リード
端子１１−２が接合できる高さの突起１１−２を
設けてなることを特徴とするリードレスチツプキ
ヤリヤパツケージ。 This is a semiconductor package that is surface mounted on a printed wiring board, and the connection pattern 2-1 of the printed wiring board 2 and the lead terminal 11-2 are bonded to the bonding surface 11-1 on which the lead terminal 11-2 of the semiconductor package is formed. A leadless chip carrier package characterized in that a protrusion 11-2 is provided with a height that allows the two to be joined.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7589488U JPH01179446U (en) | 1988-06-07 | 1988-06-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7589488U JPH01179446U (en) | 1988-06-07 | 1988-06-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01179446U true JPH01179446U (en) | 1989-12-22 |
Family
ID=31300944
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7589488U Pending JPH01179446U (en) | 1988-06-07 | 1988-06-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01179446U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1140693A (en) * | 1997-07-18 | 1999-02-12 | Denso Corp | Electronic parts |
-
1988
- 1988-06-07 JP JP7589488U patent/JPH01179446U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1140693A (en) * | 1997-07-18 | 1999-02-12 | Denso Corp | Electronic parts |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH01179446U (en) | ||
| JPH0284368U (en) | ||
| JPH0418474U (en) | ||
| JPH01176950U (en) | ||
| JPS63147831U (en) | ||
| JPS606235U (en) | Case for microwave hybrid integrated circuit | |
| JPS6418752U (en) | ||
| JPS63185222U (en) | ||
| JPS62201941U (en) | ||
| JPH0221754U (en) | ||
| JPH0385682U (en) | ||
| JPS6094861U (en) | printed circuit device | |
| JPH0375546U (en) | ||
| JPS59104539U (en) | Chippukiyariya | |
| JPS6424835U (en) | ||
| JPS6371570U (en) | ||
| JPS6228474U (en) | ||
| JPH0467353U (en) | ||
| JPS619843U (en) | Leadless chip carrier | |
| JPS6035569U (en) | Chip carrier bump connection structure | |
| JPS63110051U (en) | ||
| JPH0282127U (en) | ||
| JPS6035539U (en) | Grounding structure of semiconductor chips | |
| JPS63100875U (en) | ||
| JPS6260069U (en) |