JPS63100875U - - Google Patents
Info
- Publication number
- JPS63100875U JPS63100875U JP19566086U JP19566086U JPS63100875U JP S63100875 U JPS63100875 U JP S63100875U JP 19566086 U JP19566086 U JP 19566086U JP 19566086 U JP19566086 U JP 19566086U JP S63100875 U JPS63100875 U JP S63100875U
- Authority
- JP
- Japan
- Prior art keywords
- leadless chip
- ceramic
- hybrid
- output terminal
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 4
- 239000000969 carrier Substances 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
Description
第１図は本考案の一実施例に係るセラミツク基
板の表面の斜視図、第２図はセラミツク基板の裏
面の斜視図、第３図は本考案のセラミツク基板を
用いたハイブリツドＩＣの一実施例を示す斜視図
である。
１……セラミツク基板、２……入出力端子、３
ａ，３ｂ……リードレスチツプキヤリア、４……
相互配線、５……入出力端子パツド、１０……取
付けパツド、１１……抵抗体、１２……電力印加
導体、２０……ハイブリツドＩＣ。
FIG. 1 is a perspective view of the front surface of a ceramic substrate according to an embodiment of the present invention, FIG. 2 is a perspective view of the back surface of the ceramic substrate, and FIG. 3 is an embodiment of a hybrid IC using the ceramic substrate of the present invention. FIG. 1... Ceramic board, 2... Input/output terminal, 3
a, 3b...Leadless chip carrier, 4...
Mutual wiring, 5... Input/output terminal pad, 10... Mounting pad, 11... Resistor, 12... Power application conductor, 20... Hybrid IC.
Claims (1)
形受動部品が搭載され、かつ少なくとも一辺に入
出力端子を有するハイブリツドＩＣのセラミツク
基板において、リードレスチツプキヤリアがはん
だ付けされる取付けパツドの位置に対応する基板
本体の裏面に抵抗体を有することを特徴とするセ
ラミツク基板。 In a hybrid IC ceramic board on which a plurality of leadless chip carriers and chip-shaped passive components are mounted and which has an input/output terminal on at least one side, the part of the board body corresponding to the position of the mounting pad to which the leadless chip carrier is soldered is A ceramic substrate characterized by having a resistor on its back surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19566086U JPS63100875U (en) | 1986-12-19 | 1986-12-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19566086U JPS63100875U (en) | 1986-12-19 | 1986-12-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63100875U true JPS63100875U (en) | 1988-06-30 |
Family
ID=31153748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19566086U Pending JPS63100875U (en) | 1986-12-19 | 1986-12-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63100875U (en) |
-
1986
- 1986-12-19 JP JP19566086U patent/JPS63100875U/ja active Pending