JPS6390859U - - Google Patents

Info

Publication number
JPS6390859U
JPS6390859U JP18583986U JP18583986U JPS6390859U JP S6390859 U JPS6390859 U JP S6390859U JP 18583986 U JP18583986 U JP 18583986U JP 18583986 U JP18583986 U JP 18583986U JP S6390859 U JPS6390859 U JP S6390859U
Authority
JP
Japan
Prior art keywords
package
package body
rows
utility
accommodating portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18583986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18583986U priority Critical patent/JPS6390859U/ja
Publication of JPS6390859U publication Critical patent/JPS6390859U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは本考案の一実施例に係るICパ
ツケージの斜視図であり、同図aは表面、同図b
は裏面から見た図、第2図a,bは従来のICパ
ツケージの斜視図であり、同図aは表面、同図b
は裏面から見た図、第3図は従来ICパツケージ
によるプリント基板実装図、第4図は本考案のI
Cパツケージによるプリント基板実装図である。 1:ICパツケージ本体、2:ICリード端子
、3:ICチツプ収容部、4:ICリード間隙、
5:ICパツケージ外形、6:セラミツクコンデ
ンサ外形、7:スルーホール。
Figures 1a and 1b are perspective views of an IC package according to an embodiment of the present invention;
2A and 2B are perspective views of the conventional IC package; FIG.
is a view seen from the back side, Figure 3 is a printed circuit board mounting diagram using a conventional IC package, and Figure 4 is a diagram of the I of the present invention.
It is a printed circuit board mounting diagram using a C package. 1: IC package body, 2: IC lead terminal, 3: IC chip housing, 4: IC lead gap,
5: IC package outline, 6: Ceramic capacitor outline, 7: Through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ICパツケージ本体と、このICパツケージ本
体の一面に設けたICチツプ収容部と、前記IC
パツケージ本体の他面に二列に並んで配置した複
数本のICリード端子とを具備したことを特徴と
するICパツケージ。
An IC package body, an IC chip accommodating portion provided on one side of the IC package body, and
An IC package cage characterized by comprising a plurality of IC lead terminals arranged in two rows on the other side of the package body.
JP18583986U 1986-12-02 1986-12-02 Pending JPS6390859U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18583986U JPS6390859U (en) 1986-12-02 1986-12-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18583986U JPS6390859U (en) 1986-12-02 1986-12-02

Publications (1)

Publication Number Publication Date
JPS6390859U true JPS6390859U (en) 1988-06-13

Family

ID=31134843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18583986U Pending JPS6390859U (en) 1986-12-02 1986-12-02

Country Status (1)

Country Link
JP (1) JPS6390859U (en)

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