JPS62128674U - - Google Patents
Info
- Publication number
- JPS62128674U JPS62128674U JP1617786U JP1617786U JPS62128674U JP S62128674 U JPS62128674 U JP S62128674U JP 1617786 U JP1617786 U JP 1617786U JP 1617786 U JP1617786 U JP 1617786U JP S62128674 U JPS62128674 U JP S62128674U
- Authority
- JP
- Japan
- Prior art keywords
- circuit device
- substrate
- circuit
- view
- elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002184 metal Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 3
- 238000007789 sealing Methods 0.000 claims 1
Landscapes
- Mounting Of Printed Circuit Boards And The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1図乃至第7図は、本考案に係る回路装置の
実施例を示し、第1図は分解斜視図、第2図は一
部の分解斜視図、第3図はケースを除いた斜視図
、第4図Aはチツプ素子を封止する前の断面図、
第4図Bはチツプ素子を封止した後の断面図、第
5図は斜視図、第6図は端子側からみた斜視図、
第7図はケース蓋を取除いた斜視図、第8図は従
来の回路装置の一部を示す斜視図である。
1,9,12……基板、7……ケース本体、8
……取出し端子、10……ケース蓋、11……金
属板、12a……ICチツプ、12b……SAW
チツプ、13……キヤツプ。
1 to 7 show an embodiment of the circuit device according to the present invention, FIG. 1 is an exploded perspective view, FIG. 2 is a partially exploded perspective view, and FIG. 3 is a perspective view with the case removed. , FIG. 4A is a cross-sectional view before the chip element is sealed;
FIG. 4B is a sectional view after the chip element is sealed, FIG. 5 is a perspective view, and FIG. 6 is a perspective view seen from the terminal side.
FIG. 7 is a perspective view with the case lid removed, and FIG. 8 is a perspective view showing a part of the conventional circuit device. 1, 9, 12... Board, 7... Case body, 8
...Takeout terminal, 10...Case lid, 11...Metal plate, 12a...IC chip, 12b...SAW
Chip, 13...cap.
Claims (1)
の基板を取付け、かつ前記複数のチツプ素子をキ
ヤツプ封止した第1の回路装置と、第2の基板面
上に複数の回路素子を形成した第2の回路装置と
を備え、前記第2の基板の裏面に前記第1の回路
装置を取付けるとともに、前記第1の回路装置を
前記第2の回路装置と電気的に接続してなる構成
の回路装置。 A first device in which a plurality of chip elements are formed on a metal plate.
a first circuit device having a substrate mounted thereon and cap-sealing the plurality of chip elements; and a second circuit device having a plurality of circuit elements formed on a second substrate surface; A circuit device configured such that the first circuit device is attached to the back surface of a substrate, and the first circuit device is electrically connected to the second circuit device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986016177U JPH039345Y2 (en) | 1986-02-06 | 1986-02-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986016177U JPH039345Y2 (en) | 1986-02-06 | 1986-02-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62128674U true JPS62128674U (en) | 1987-08-14 |
JPH039345Y2 JPH039345Y2 (en) | 1991-03-08 |
Family
ID=30807794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986016177U Expired JPH039345Y2 (en) | 1986-02-06 | 1986-02-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH039345Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0295276U (en) * | 1989-01-18 | 1990-07-30 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5950465U (en) * | 1982-09-27 | 1984-04-03 | 株式会社東芝 | Mounting structure of printed wiring board |
JPS59171381U (en) * | 1983-05-02 | 1984-11-16 | 富士通株式会社 | module case |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5950465B2 (en) * | 1975-11-07 | 1984-12-08 | テイコクピストンリング カブシキガイシヤ | Cylinder liner Oyobi Sonohoning Hohou |
-
1986
- 1986-02-06 JP JP1986016177U patent/JPH039345Y2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5950465U (en) * | 1982-09-27 | 1984-04-03 | 株式会社東芝 | Mounting structure of printed wiring board |
JPS59171381U (en) * | 1983-05-02 | 1984-11-16 | 富士通株式会社 | module case |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0295276U (en) * | 1989-01-18 | 1990-07-30 |
Also Published As
Publication number | Publication date |
---|---|
JPH039345Y2 (en) | 1991-03-08 |