JPS61171275U

JPS61171275U -

Info

Publication number: JPS61171275U
Application number: JP5495885U
Authority: JP
Priority date: 1985-04-13
Filing date: 1985-04-13
Publication date: 1986-10-24

Description

[Brief explanation of the drawing]

第１図イは本考案の一実施例に係る半導体装置
の平面図、第１図ロは第１図イの線Ａ‐Ａに沿つ
た断面図、第２図イは本考案の第２の実施例の断
面図、第２図ロは基板が撓んだときの断面図、第
３図イ，ロ，ハ，ニは本考案の製造工程を説明す
るための断面図、第４図イは従来例の平面図、第
４図ロは第４図イの線Ｂ‐Ｂに沿つた断面図、第
５図イは他の従来例の平面図、第５図ロは第５図
イの線Ｃ‐Ｃに沿つた断面図である。１…半導体チツプ、５…チツプ部品、６…デイ
スクリート部品、２０…第１の基板、２１…第２
の基板、２０ａ，２１ａ…配線パターン。 FIG. 1A is a plan view of a semiconductor device according to an embodiment of the present invention, FIG. 1B is a sectional view taken along line A-A of FIG. 1A, and FIG. A sectional view of the embodiment, FIG. 2B is a sectional view when the substrate is bent, FIGS. A plan view of the conventional example, FIG. 4B is a sectional view taken along the line BB of FIG. 4A, FIG. 5A is a plan view of another conventional example, and FIG. 5B is a cross-sectional view taken along the line of FIG. It is a sectional view along CC. DESCRIPTION OF SYMBOLS 1... Semiconductor chip, 5... Chip component, 6... Discrete component, 20... First board, 21... Second
board, 20a, 21a... wiring pattern.

Claims

[Scope of utility model registration request]

The semiconductor device includes a semiconductor element, a first substrate on which a first wiring pattern is formed, and a second substrate having an opening in which the first substrate is disposed and on which a second wiring pattern is formed. A semiconductor device characterized in that a semiconductor element is connected to a first wiring pattern, a first substrate is placed in an opening of a second substrate, and the first wiring pattern and the second wiring pattern are electrically connected. .