JPS6312840U - - Google Patents

Info

Publication number
JPS6312840U
JPS6312840U JP9067286U JP9067286U JPS6312840U JP S6312840 U JPS6312840 U JP S6312840U JP 9067286 U JP9067286 U JP 9067286U JP 9067286 U JP9067286 U JP 9067286U JP S6312840 U JPS6312840 U JP S6312840U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
frame
insulating substrate
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9067286U
Other languages
Japanese (ja)
Other versions
JPH0436123Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9067286U priority Critical patent/JPH0436123Y2/ja
Publication of JPS6312840U publication Critical patent/JPS6312840U/ja
Application granted granted Critical
Publication of JPH0436123Y2 publication Critical patent/JPH0436123Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Combinations Of Printed Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す断面図、第2図
及び第3図は従来例を示す断面図である。 1,2……第1及び第2の混成集積回路基板、
3……絶縁性基板、4……枠体、5,6……回路
素子、7……第1の段差部、8……第2の段差部
、9……第3の段差部。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIGS. 2 and 3 are sectional views showing a conventional example. 1, 2...first and second hybrid integrated circuit boards,
3... Insulating substrate, 4... Frame, 5, 6... Circuit element, 7... First step, 8... Second step, 9... Third step.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路素子が設けられた第1及び第2の混成集積
回路基板と、該第2の混成集積回路基板より大き
く且つ前記第2の混成集積回路基板の基板露出面
に密着して設けられる金属から成る絶縁性基板と
、前記第1及び第2の混成集積回路基板を所定間
隔離間する枠体とを備えた混成集積回路において
、前記第2の混成集積回路基板は前記枠体と前記
絶縁性基板とで圧着固定され且つ前記絶縁性基板
は前記枠体の当接面で接着されていることを特徴
とする混成集積回路。
It consists of first and second hybrid integrated circuit boards provided with circuit elements, and a metal that is larger than the second hybrid integrated circuit board and is provided in close contact with the exposed surface of the second hybrid integrated circuit board. In a hybrid integrated circuit comprising an insulating substrate and a frame that separates the first and second hybrid integrated circuit boards by a predetermined distance, the second hybrid integrated circuit board is arranged between the frame and the insulating substrate. 1. A hybrid integrated circuit, characterized in that the insulating substrate is crimped and fixed by the frame, and the insulating substrate is bonded to the abutment surface of the frame.
JP9067286U 1986-06-13 1986-06-13 Expired JPH0436123Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9067286U JPH0436123Y2 (en) 1986-06-13 1986-06-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9067286U JPH0436123Y2 (en) 1986-06-13 1986-06-13

Publications (2)

Publication Number Publication Date
JPS6312840U true JPS6312840U (en) 1988-01-27
JPH0436123Y2 JPH0436123Y2 (en) 1992-08-26

Family

ID=30950751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9067286U Expired JPH0436123Y2 (en) 1986-06-13 1986-06-13

Country Status (1)

Country Link
JP (1) JPH0436123Y2 (en)

Also Published As

Publication number Publication date
JPH0436123Y2 (en) 1992-08-26

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