JPS6260069U - - Google Patents

Info

Publication number
JPS6260069U
JPS6260069U JP15185185U JP15185185U JPS6260069U JP S6260069 U JPS6260069 U JP S6260069U JP 15185185 U JP15185185 U JP 15185185U JP 15185185 U JP15185185 U JP 15185185U JP S6260069 U JPS6260069 U JP S6260069U
Authority
JP
Japan
Prior art keywords
chip carrier
hybrid integrated
carrier component
integrated circuit
leadless chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15185185U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15185185U priority Critical patent/JPS6260069U/ja
Publication of JPS6260069U publication Critical patent/JPS6260069U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の第1の実施例になる混成集積
回路の要部を示すため一部を破断した側面図、第
2図は本考案の第2の実施例になる混成集積回路
の要部を示すため一部を破断した側面図、第3図
は本考案の第3の実施例になる混成集積回路の要
部を示すため一部を破断した側面図、第4図は従
来技術になる混成集積回路の要部を示す側面図、
第5図は該混成集積回路に搭載されたLCC部品
の平面図、である。 図中において、1,8は回路基板、3は透孔、
4はリードレスチツプキヤリヤ(LCC)部品、
7,10,13,24は混成集積回路、を示す。
FIG. 1 is a partially cutaway side view showing the main parts of a hybrid integrated circuit according to a first embodiment of the present invention, and FIG. 2 is a main part of a hybrid integrated circuit according to a second embodiment of the present invention. FIG. 3 is a partially cutaway side view to show the main parts of a hybrid integrated circuit according to a third embodiment of the present invention, and FIG. A side view showing the main parts of a hybrid integrated circuit,
FIG. 5 is a plan view of the LCC components mounted on the hybrid integrated circuit. In the figure, 1 and 8 are circuit boards, 3 is a through hole,
4 is leadless chip carrier (LCC) parts,
7, 10, 13, and 24 indicate hybrid integrated circuits.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リードレスチツプキヤリヤ部品4を搭載する回
路基板1が、該搭載リードレスチツプキヤリヤ部
品4の下面に対向し透孔3を明けてなることを特
徴とする混成集積回路。
A hybrid integrated circuit characterized in that a circuit board 1 on which a leadless chip carrier component 4 is mounted has a through hole 3 facing the lower surface of the mounted leadless chip carrier component 4.
JP15185185U 1985-10-03 1985-10-03 Pending JPS6260069U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15185185U JPS6260069U (en) 1985-10-03 1985-10-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15185185U JPS6260069U (en) 1985-10-03 1985-10-03

Publications (1)

Publication Number Publication Date
JPS6260069U true JPS6260069U (en) 1987-04-14

Family

ID=31069295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15185185U Pending JPS6260069U (en) 1985-10-03 1985-10-03

Country Status (1)

Country Link
JP (1) JPS6260069U (en)

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