JPH0114616B2 - - Google Patents

Info

Publication number
JPH0114616B2
JPH0114616B2 JP59180586A JP18058684A JPH0114616B2 JP H0114616 B2 JPH0114616 B2 JP H0114616B2 JP 59180586 A JP59180586 A JP 59180586A JP 18058684 A JP18058684 A JP 18058684A JP H0114616 B2 JPH0114616 B2 JP H0114616B2
Authority
JP
Japan
Prior art keywords
interrupt
input
cpu
address
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59180586A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6159565A (ja
Inventor
Toshio Endo
Tadashi Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP18058684A priority Critical patent/JPS6159565A/ja
Publication of JPS6159565A publication Critical patent/JPS6159565A/ja
Publication of JPH0114616B2 publication Critical patent/JPH0114616B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Bus Control (AREA)
JP18058684A 1984-08-31 1984-08-31 マルチコンピユ−タシステムの割込入力装置 Granted JPS6159565A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18058684A JPS6159565A (ja) 1984-08-31 1984-08-31 マルチコンピユ−タシステムの割込入力装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18058684A JPS6159565A (ja) 1984-08-31 1984-08-31 マルチコンピユ−タシステムの割込入力装置

Publications (2)

Publication Number Publication Date
JPS6159565A JPS6159565A (ja) 1986-03-27
JPH0114616B2 true JPH0114616B2 (US06653308-20031125-C00199.png) 1989-03-13

Family

ID=16085851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18058684A Granted JPS6159565A (ja) 1984-08-31 1984-08-31 マルチコンピユ−タシステムの割込入力装置

Country Status (1)

Country Link
JP (1) JPS6159565A (US06653308-20031125-C00199.png)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62243058A (ja) * 1986-04-15 1987-10-23 Fanuc Ltd マルチプロセツサシステムの割込制御方法
JPH04271434A (ja) * 1991-02-27 1992-09-28 Fuji Electric Co Ltd プログラマブルコントローラの割込み入力モジュール
JP2007206955A (ja) * 2006-02-01 2007-08-16 Sony Corp 情報処理装置および方法、プログラム、並びに記録媒体

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115732A (US06653308-20031125-C00199.png) * 1974-02-22 1975-09-10
JPS5534752A (en) * 1978-09-01 1980-03-11 Nec Corp Common access unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115732A (US06653308-20031125-C00199.png) * 1974-02-22 1975-09-10
JPS5534752A (en) * 1978-09-01 1980-03-11 Nec Corp Common access unit

Also Published As

Publication number Publication date
JPS6159565A (ja) 1986-03-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees