JPH01110446U - - Google Patents
Info
- Publication number
- JPH01110446U JPH01110446U JP552988U JP552988U JPH01110446U JP H01110446 U JPH01110446 U JP H01110446U JP 552988 U JP552988 U JP 552988U JP 552988 U JP552988 U JP 552988U JP H01110446 U JPH01110446 U JP H01110446U
- Authority
- JP
- Japan
- Prior art keywords
- resin package
- lead frame
- integrated circuit
- periphery
- tie bars
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案による集積回路用リードフレー
ムの一実施例を示す要部断面図、第２図は従来の
集積回路用リードフレームにおける樹脂パツケー
ジのバリの説明図である。
符号の説明、１……樹脂パツケージ、１ａ……
周縁、２……集積回路用リードフレーム、３……
アウタリード、４……タイバー、５，５ａ……隙
間、６……小片、６ａ……縁部、６ｂ……縁部、
７……インナリード、８……樹脂パツケージ、８
ａ……バリ、９……集積回路用リードフレーム。
FIG. 1 is a sectional view of a main part of an embodiment of a lead frame for integrated circuits according to the present invention, and FIG. 2 is an explanatory diagram of burrs on a resin package in a conventional lead frame for integrated circuits. Explanation of symbols, 1...Resin package, 1a...
Periphery, 2... Lead frame for integrated circuit, 3...
Outer lead, 4... tie bar, 5, 5a... gap, 6... small piece, 6a... edge, 6b... edge,
7...Inner lead, 8...Resin package, 8
a...Flash, 9...Lead frame for integrated circuit.
Claims (1)
リードフレームのタイバー、アウタリードなどと
樹脂パツケージの周縁の一部に囲まれる複数の隙
間に、タイバーと接続し、かつ樹脂パツケージの
周縁の一部に沿つて近接する縁部を有する小片を
設けたことを特徴とする集積回路用リードフレー
ム。 Connect to the tie bars and close along a part of the periphery of the resin package into multiple gaps between the tie bars, outer leads, etc. of an integrated circuit lead frame to which the resin package is attached inside, and a part of the periphery of the resin package. A lead frame for an integrated circuit, characterized in that a small piece having an edge is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP552988U JPH01110446U (en) | 1988-01-20 | 1988-01-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP552988U JPH01110446U (en) | 1988-01-20 | 1988-01-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01110446U true JPH01110446U (en) | 1989-07-26 |
Family
ID=31208981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP552988U Pending JPH01110446U (en) | 1988-01-20 | 1988-01-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01110446U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017060970A1 (en) * | 2015-10-06 | 2017-04-13 | 三菱電機株式会社 | Manufacturing method for semiconductor device |
-
1988
- 1988-01-20 JP JP552988U patent/JPH01110446U/ja active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017060970A1 (en) * | 2015-10-06 | 2017-04-13 | 三菱電機株式会社 | Manufacturing method for semiconductor device |
| CN108140583A (en) * | 2015-10-06 | 2018-06-08 | 三菱电机株式会社 | The manufacturing method of semiconductor device |
| US10490422B2 (en) | 2015-10-06 | 2019-11-26 | Mitsubishi Electric Corporation | Manufacturing method for semiconductor device |
| CN108140583B (en) * | 2015-10-06 | 2021-06-11 | 三菱电机株式会社 | Method for manufacturing semiconductor device |