JP7809826B2 - Ｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハを製造するための方法、およびｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハ - Google Patents

Ｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハを製造するための方法、およびｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハ

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JP7809826B2
JP7809826B2 JP2024551633A JP2024551633A JP7809826B2 JP 7809826 B2 JP7809826 B2 JP 7809826B2 JP 2024551633 A JP2024551633 A JP 2024551633A JP 2024551633 A JP2024551633 A JP 2024551633A JP 7809826 B2 JP7809826 B2 JP 7809826B2
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nitrogen
single crystal
silicon single
crystal wafer
wafer
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JP2025506905A (ja
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マーフィー，ブライアン
タパ，サラド・バハドゥール
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Siltronic AG
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Siltronic AG
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
    • H10P14/3216—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6316—Formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • H10P95/405—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies using cavities formed by hydrogen or noble gas ion implantation

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  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
JP2024551633A 2022-03-03 2023-02-15 Ｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハを製造するための方法、およびｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハ Active JP7809826B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP22159979.8A EP4239658A1 (de) 2022-03-03 2022-03-03 Verfahren zur herstellung eines substratwafers zum darauf erstellen von gruppe-iii-v-vorrichtungen und substratwafer zum darauf erstellen von gruppe-iii-v-vorrichtungen
EP22159979.8 2022-03-03
PCT/EP2023/053694 WO2023165808A1 (en) 2022-03-03 2023-02-15 A method for manufacturing a substrate wafer for building group iii-v devices thereon and a substrate wafer for building group iii-v devices thereon

Publications (2)

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JP2025506905A JP2025506905A (ja) 2025-03-13
JP7809826B2 true JP7809826B2 (ja) 2026-02-02

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JP2024551633A Active JP7809826B2 (ja) 2022-03-03 2023-02-15 Ｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハを製造するための方法、およびｉｉｉ－ｖ族デバイスをその上に構築するための基板ウェハ

Country Status (7)

Country Link
US (1) US20250167005A1 (de)
EP (1) EP4239658A1 (de)
JP (1) JP7809826B2 (de)
KR (1) KR20240140178A (de)
CN (1) CN118830056A (de)
TW (1) TWI885332B (de)
WO (1) WO2023165808A1 (de)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007208268A (ja) 2006-02-02 2007-08-16 Siltronic Ag 半導体層構造及び半導体層構造の製造方法
JP2012015305A (ja) 2010-06-30 2012-01-19 Sumitomo Electric Ind Ltd 半導体装置の製造方法
JP2017152570A (ja) 2016-02-25 2017-08-31 株式会社Sumco エピタキシャルウェーハの製造方法およびエピタキシャルウェーハ
JP2018101701A (ja) 2016-12-20 2018-06-28 住友電工デバイス・イノベーション株式会社 半導体基板およびその製造方法
JP2018107290A (ja) 2016-12-27 2018-07-05 住友化学株式会社 半導体基板および電子デバイス
JP2019089704A (ja) 2015-11-12 2019-06-13 株式会社Sumco Ｉｉｉ族窒化物半導体基板の製造方法
JP2020182002A (ja) 2020-08-03 2020-11-05 株式会社サイオクス 窒化物半導体テンプレートおよび窒化物半導体デバイス

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100936869B1 (ko) * 2007-12-10 2010-01-14 고려대학교 산학협력단 질화물 반도체소자 및 그 제조방법
US8008181B2 (en) * 2008-08-22 2011-08-30 The Regents Of The University Of California Propagation of misfit dislocations from buffer/Si interface into Si
KR100988126B1 (ko) * 2008-09-18 2010-10-18 고려대학교 산학협력단 이온주입을 통한 질화물 반도체 형성 방법 및 이를 이용하여 제조한 발광다이오드
US9263271B2 (en) 2012-10-25 2016-02-16 Infineon Technologies Ag Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing a semiconductor device
DE102013218880A1 (de) * 2012-11-20 2014-05-22 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe, umfassend das gleichzeitige Polieren einer Vorderseite und einer Rückseite einer Substratscheibe
WO2015123534A1 (en) 2014-02-14 2015-08-20 Dow Corning Corporation Group iii-n substrate and transistor with implanted buffer layer
US9633920B2 (en) 2015-02-12 2017-04-25 Taiwan Semiconductor Manufacturing Co., Ltd. Low damage passivation layer for III-V based devices
DE102016210203B3 (de) * 2016-06-09 2017-08-31 Siltronic Ag Suszeptor zum Halten einer Halbleiterscheibe, Verfahren zum Abscheiden einer epitaktischen Schicht auf einer Vorderseite einer Halbleiterscheibe und Halbleiterscheibe mit epitaktischer Schicht
US20190013196A1 (en) * 2017-07-10 2019-01-10 M/A-Com Technology Solutions Holdings, Inc. Parasitic channel mitigation via reaction with active species
EP3754721A1 (de) * 2019-06-17 2020-12-23 Infineon Technologies AG Halbleiterbauelement und verfahren zur herstellung eines wafers

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007208268A (ja) 2006-02-02 2007-08-16 Siltronic Ag 半導体層構造及び半導体層構造の製造方法
JP2012015305A (ja) 2010-06-30 2012-01-19 Sumitomo Electric Ind Ltd 半導体装置の製造方法
JP2019089704A (ja) 2015-11-12 2019-06-13 株式会社Sumco Ｉｉｉ族窒化物半導体基板の製造方法
JP2017152570A (ja) 2016-02-25 2017-08-31 株式会社Sumco エピタキシャルウェーハの製造方法およびエピタキシャルウェーハ
JP2018101701A (ja) 2016-12-20 2018-06-28 住友電工デバイス・イノベーション株式会社 半導体基板およびその製造方法
JP2018107290A (ja) 2016-12-27 2018-07-05 住友化学株式会社 半導体基板および電子デバイス
JP2020182002A (ja) 2020-08-03 2020-11-05 株式会社サイオクス 窒化物半導体テンプレートおよび窒化物半導体デバイス

Also Published As

Publication number Publication date
WO2023165808A1 (en) 2023-09-07
KR20240140178A (ko) 2024-09-24
TWI885332B (zh) 2025-06-01
EP4239658A1 (de) 2023-09-06
TW202349462A (zh) 2023-12-16
CN118830056A (zh) 2024-10-22
US20250167005A1 (en) 2025-05-22
JP2025506905A (ja) 2025-03-13

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