JP7766265B2 - デバイス、デバイス製造装置、及びデバイス製造方法 - Google Patents

デバイス、デバイス製造装置、及びデバイス製造方法

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Publication number
JP7766265B2
JP7766265B2 JP2023500565A JP2023500565A JP7766265B2 JP 7766265 B2 JP7766265 B2 JP 7766265B2 JP 2023500565 A JP2023500565 A JP 2023500565A JP 2023500565 A JP2023500565 A JP 2023500565A JP 7766265 B2 JP7766265 B2 JP 7766265B2
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JP
Japan
Prior art keywords
chip
substrate
external connection
device manufacturing
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2023500565A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2022176341A1 (https=
Inventor
健 玉利
清一 糸井
大輔 櫻井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
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Filing date
Publication date
Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Publication of JPWO2022176341A1 publication Critical patent/JPWO2022176341A1/ja
Application granted granted Critical
Publication of JP7766265B2 publication Critical patent/JP7766265B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07141—Means for applying energy, e.g. ovens or lasers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07183—Means for monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts

Landscapes

  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
JP2023500565A 2021-02-17 2021-12-10 デバイス、デバイス製造装置、及びデバイス製造方法 Active JP7766265B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021023322 2021-02-17
JP2021023322 2021-02-17
PCT/JP2021/045454 WO2022176341A1 (ja) 2021-02-17 2021-12-10 デバイス、デバイス製造装置、及びデバイス製造方法

Publications (2)

Publication Number Publication Date
JPWO2022176341A1 JPWO2022176341A1 (https=) 2022-08-25
JP7766265B2 true JP7766265B2 (ja) 2025-11-10

Family

ID=82931383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023500565A Active JP7766265B2 (ja) 2021-02-17 2021-12-10 デバイス、デバイス製造装置、及びデバイス製造方法

Country Status (4)

Country Link
JP (1) JP7766265B2 (https=)
KR (1) KR102928611B1 (https=)
CN (1) CN116802779A (https=)
WO (1) WO2022176341A1 (https=)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003023039A (ja) 2001-07-05 2003-01-24 Matsushita Electric Ind Co Ltd ボンディングダメージの計測方法
JP2005228820A (ja) 2004-02-10 2005-08-25 Renesas Technology Corp 半導体装置およびその製造方法
JP2006013074A (ja) 2004-06-24 2006-01-12 Matsushita Electric Ind Co Ltd 半導体実装装置、半導体実装方法
JP2007157970A (ja) 2005-12-05 2007-06-21 Sony Corp ボンディング方法及びボンディング装置
JP2007178311A (ja) 2005-12-28 2007-07-12 Nidec-Read Corp プローブ

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013051355A (ja) * 2011-08-31 2013-03-14 Fujikura Ltd 貫通配線の検査方法、貫通配線基板の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003023039A (ja) 2001-07-05 2003-01-24 Matsushita Electric Ind Co Ltd ボンディングダメージの計測方法
JP2005228820A (ja) 2004-02-10 2005-08-25 Renesas Technology Corp 半導体装置およびその製造方法
JP2006013074A (ja) 2004-06-24 2006-01-12 Matsushita Electric Ind Co Ltd 半導体実装装置、半導体実装方法
JP2007157970A (ja) 2005-12-05 2007-06-21 Sony Corp ボンディング方法及びボンディング装置
JP2007178311A (ja) 2005-12-28 2007-07-12 Nidec-Read Corp プローブ

Also Published As

Publication number Publication date
CN116802779A (zh) 2023-09-22
WO2022176341A1 (ja) 2022-08-25
JPWO2022176341A1 (https=) 2022-08-25
KR20230145330A (ko) 2023-10-17
KR102928611B1 (ko) 2026-02-20
TW202249234A (zh) 2022-12-16

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