JP7210092B2 - 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング - Google Patents
高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング Download PDFInfo
- Publication number
- JP7210092B2 JP7210092B2 JP2019563215A JP2019563215A JP7210092B2 JP 7210092 B2 JP7210092 B2 JP 7210092B2 JP 2019563215 A JP2019563215 A JP 2019563215A JP 2019563215 A JP2019563215 A JP 2019563215A JP 7210092 B2 JP7210092 B2 JP 7210092B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- gas
- metal
- etching
- exposing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
- H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
- C23F1/10—Etching compositions
- C23F1/12—Gaseous compositions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
- H01L21/471—Inorganic layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Plasma & Fusion (AREA)
- Chemical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- ing And Chemical Polishing (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2022126823A JP7459420B2 (ja) | 2017-05-15 | 2022-08-09 | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762506299P | 2017-05-15 | 2017-05-15 | |
| US62/506,299 | 2017-05-15 | ||
| US201762528061P | 2017-07-01 | 2017-07-01 | |
| US62/528,061 | 2017-07-01 | ||
| PCT/US2018/032743 WO2018213295A1 (en) | 2017-05-15 | 2018-05-15 | In-situ selective deposition and etching for advanced patterning applications |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022126823A Division JP7459420B2 (ja) | 2017-05-15 | 2022-08-09 | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020520125A JP2020520125A (ja) | 2020-07-02 |
| JP2020520125A5 JP2020520125A5 (enExample) | 2021-04-15 |
| JP7210092B2 true JP7210092B2 (ja) | 2023-01-23 |
Family
ID=64097990
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019563215A Active JP7210092B2 (ja) | 2017-05-15 | 2018-05-15 | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング |
| JP2022126823A Active JP7459420B2 (ja) | 2017-05-15 | 2022-08-09 | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022126823A Active JP7459420B2 (ja) | 2017-05-15 | 2022-08-09 | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10529584B2 (enExample) |
| JP (2) | JP7210092B2 (enExample) |
| KR (3) | KR102553117B1 (enExample) |
| TW (1) | TWI801385B (enExample) |
| WO (1) | WO2018213295A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3503164A1 (en) * | 2017-12-21 | 2019-06-26 | IMEC vzw | Selective deposition of metal-organic frameworks |
| TWI792002B (zh) * | 2019-06-11 | 2023-02-11 | 美商應用材料股份有限公司 | 使用氟及金屬鹵化物來蝕刻金屬氧化物 |
| EP3919979A1 (en) | 2020-06-02 | 2021-12-08 | Imec VZW | Resistless patterning mask |
| US12057318B2 (en) | 2020-09-29 | 2024-08-06 | Changxin Memory Technologies, Inc. | Method for forming film layer |
| KR20240006268A (ko) | 2022-07-06 | 2024-01-15 | 에스케이스페셜티 주식회사 | 금속 산화막의 원자층 식각 방법 |
| KR20240112584A (ko) | 2023-01-12 | 2024-07-19 | 에스케이스페셜티 주식회사 | 원자층 식각 방법 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016100873A1 (en) | 2014-12-18 | 2016-06-23 | The Regents Of The University Of Colorado, A Body Corporate | Novel methods of atomic layer etching (ale) using sequential, self-limiting thermal reactions |
| US20180182597A1 (en) | 2016-12-22 | 2018-06-28 | Asm Ip Holding B.V. | Atomic layer etching processes |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4902645A (en) | 1987-08-24 | 1990-02-20 | Fujitsu Limited | Method of selectively forming a silicon-containing metal layer |
| KR920003555B1 (ko) * | 1989-11-13 | 1992-05-04 | 이시영 | 정수기 |
| JP3334911B2 (ja) * | 1992-07-31 | 2002-10-15 | キヤノン株式会社 | パターン形成方法 |
| JPH0758712B2 (ja) * | 1993-02-18 | 1995-06-21 | 日本電気株式会社 | 配線の形成方法 |
| JPH06275529A (ja) * | 1993-03-22 | 1994-09-30 | Hitachi Ltd | 化合物半導体装置の製造方法 |
| US7157385B2 (en) * | 2003-09-05 | 2007-01-02 | Micron Technology, Inc. | Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry |
| US20040198069A1 (en) * | 2003-04-04 | 2004-10-07 | Applied Materials, Inc. | Method for hafnium nitride deposition |
| CN101048531A (zh) * | 2004-07-07 | 2007-10-03 | 通用电气公司 | 基材上的保护涂层及其制备方法 |
| JP5719138B2 (ja) * | 2009-12-22 | 2015-05-13 | 株式会社日立国際電気 | 半導体装置の製造方法および基板処理方法 |
| US8293658B2 (en) * | 2010-02-17 | 2012-10-23 | Asm America, Inc. | Reactive site deactivation against vapor deposition |
| US20140051256A1 (en) | 2012-08-15 | 2014-02-20 | Lam Research Corporation | Etch with mixed mode pulsing |
| CN103681269B (zh) * | 2012-09-03 | 2016-06-29 | 中芯国际集成电路制造(上海)有限公司 | 选择性形成高k介质层的方法 |
| US8841182B1 (en) * | 2013-03-14 | 2014-09-23 | Asm Ip Holding B.V. | Silane and borane treatments for titanium carbide films |
| TW201525173A (zh) * | 2013-12-09 | 2015-07-01 | Applied Materials Inc | 選擇性層沉積之方法 |
| US9583401B2 (en) | 2014-02-12 | 2017-02-28 | International Business Machines Corporation | Nano deposition and ablation for the repair and fabrication of integrated circuits |
| JP6243290B2 (ja) * | 2014-05-01 | 2017-12-06 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
| US10971372B2 (en) * | 2015-06-26 | 2021-04-06 | Tokyo Electron Limited | Gas phase etch with controllable etch selectivity of Si-containing arc or silicon oxynitride to different films or masks |
| US10566185B2 (en) * | 2015-08-05 | 2020-02-18 | Asm Ip Holding B.V. | Selective deposition of aluminum and nitrogen containing material |
| US20170243755A1 (en) * | 2016-02-23 | 2017-08-24 | Tokyo Electron Limited | Method and system for atomic layer etching |
| JP7113651B2 (ja) * | 2017-04-11 | 2022-08-05 | 東京エレクトロン株式会社 | 逆行的なプロファイルを有する凹状フィーチャのボイドのない充填方法 |
-
2018
- 2018-05-15 KR KR1020197035798A patent/KR102553117B1/ko active Active
- 2018-05-15 KR KR1020237002883A patent/KR102711643B1/ko active Active
- 2018-05-15 WO PCT/US2018/032743 patent/WO2018213295A1/en not_active Ceased
- 2018-05-15 US US15/980,274 patent/US10529584B2/en active Active
- 2018-05-15 KR KR1020237024417A patent/KR102631150B1/ko active Active
- 2018-05-15 JP JP2019563215A patent/JP7210092B2/ja active Active
- 2018-05-15 TW TW107116408A patent/TWI801385B/zh active
-
2022
- 2022-08-09 JP JP2022126823A patent/JP7459420B2/ja active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016100873A1 (en) | 2014-12-18 | 2016-06-23 | The Regents Of The University Of Colorado, A Body Corporate | Novel methods of atomic layer etching (ale) using sequential, self-limiting thermal reactions |
| US20180182597A1 (en) | 2016-12-22 | 2018-06-28 | Asm Ip Holding B.V. | Atomic layer etching processes |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2020520125A (ja) | 2020-07-02 |
| KR20190142407A (ko) | 2019-12-26 |
| WO2018213295A1 (en) | 2018-11-22 |
| TW201907444A (zh) | 2019-02-16 |
| JP7459420B2 (ja) | 2024-04-02 |
| US10529584B2 (en) | 2020-01-07 |
| US20180330963A1 (en) | 2018-11-15 |
| KR102631150B1 (ko) | 2024-01-29 |
| TWI801385B (zh) | 2023-05-11 |
| KR20230110664A (ko) | 2023-07-24 |
| JP2022145838A (ja) | 2022-10-04 |
| KR20230019219A (ko) | 2023-02-07 |
| KR102553117B1 (ko) | 2023-07-06 |
| KR102711643B1 (ko) | 2024-09-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP7459420B2 (ja) | 高度なパターン形成用途のためのインサイチュでの選択的堆積及びエッチング | |
| JP4055941B2 (ja) | 原子層堆積法を用いて基板上に高誘電率材料を堆積する方法 | |
| JP7330664B2 (ja) | セルフアセンブル単層表面前処理を用いた選択的金属酸化物堆積 | |
| TWI721896B (zh) | 選擇性地沈積金屬氧化物膜的方法 | |
| US10381234B2 (en) | Selective film formation for raised and recessed features using deposition and etching processes | |
| JP7575953B2 (ja) | 有機材料上に金属酸化物膜を堆積するための堆積ツールおよび方法 | |
| CN114008750B (zh) | 使用氟及金属卤化物来蚀刻金属氧化物 | |
| JP2024509558A (ja) | 金属酸化物の原子層エッチング | |
| US10199223B2 (en) | Semiconductor device fabrication using etch stop layer | |
| JP2024542124A (ja) | Euvリソグラフィ用のeuv活性膜 | |
| JP3756456B2 (ja) | 半導体装置の製造方法 | |
| JP2023513110A (ja) | 選択的原子層エッチングにおける超薄型エッチストップ層の使用方法 | |
| TW202301437A (zh) | 利用烷氧化鋁氧化劑的半導體裝置用鋁氧化物膜之原子層沉積 | |
| JP2025524030A (ja) | モリブデンの選択的堆積方法 | |
| KR102553120B1 (ko) | 레트로그레이드 리세스된 피처를 충전하는 방법 | |
| KR20240006268A (ko) | 금속 산화막의 원자층 식각 방법 | |
| TW202542990A (zh) | 成膜方法 | |
| US20180294168A1 (en) | Method for anisotropic dry etching of titanium-containing films | |
| KR20040042258A (ko) | 원자층증착을 이용한 반도체 소자의 박막 형성방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210303 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20210303 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20220510 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220809 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20221213 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20230106 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20230106 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 7210092 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |