TWI801385B - 用於進階圖案化應用之原位選擇性沉積及蝕刻 - Google Patents

用於進階圖案化應用之原位選擇性沉積及蝕刻 Download PDF

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TWI801385B
TWI801385B TW107116408A TW107116408A TWI801385B TW I801385 B TWI801385 B TW I801385B TW 107116408 A TW107116408 A TW 107116408A TW 107116408 A TW107116408 A TW 107116408A TW I801385 B TWI801385 B TW I801385B
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坎達巴拉 Ｎ 泰伯利
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日商東京威力科創股份有限公司
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Abstract

本發明之實施例提出一種用於進階圖案化應用之原位選擇性沉積及蝕刻之方法。根據一實施例，該方法包括：在一處理腔室中提供一基板，該基板具有一含金屬層於其上；及使該基板暴露至一氣體脈衝序列以在沒有電漿之情況下蝕刻該含金屬層，其中該氣體脈衝序列包括任何順序之：使該基板暴露至一第一反應物氣體，該第一反應物氣體包括一含鹵素氣體，及使該基板暴露至一第二反應物氣體，該第二反應物氣體包括一烷基鋁。根據另一實施例，該基板具有一外露第一材料層及一外露第二材料層，暴露至該氣體脈衝序列係選擇性沉積一額外材料層在該外露第一材料層上、但不沉積在該外露第二材料層上。

Description

用於進階圖案化應用之原位選擇性沉積及蝕刻 [相關申請案之交互參照]
本申請案係關於及主張2017年5月15日提出之美國臨時專利申請案第62/506,299號之優先權，其完整內容係併入本申請案中之參考資料。本申請案亦關於及主張2017年7月1日提出之美國臨時專利申請案第62/528,061號之優先權，其完整內容係併入本申請案中之參考資料。
本發明係關於半導體處理及半導體元件，具體而言，本發明係關於用於進階圖案化應用之原位(in-situ)選擇性沉積及蝕刻。
當製造較小的電晶體時，圖案化特徵部之關鍵尺寸(CD)或解析度對於製造變得更具挑戰性。次10奈米技術節點需要原子等級之嚴格的厚度、均勻度且幾乎沒有裕度或變異以設計規格。自對準(self-aligned)圖案化需要取代疊對驅動(overlay-driven)圖案化，俾使即使在EUV引入之後，亦可繼續成本效益之縮放。在高度縮放的技術節點之圖案化中，薄膜之選擇性蝕刻及沉積係一關鍵步驟。
本發明之實施例提出一種用於進階圖案化應用之原位選擇性沉積及蝕刻之方法。根據一實施例，該方法包括：在一處理腔室中提供一基板，該基板具有一含金屬層於其上；及使該基板暴露至一氣體脈衝序列以在沒有電漿之情況下蝕刻該含金屬層，其中該氣體脈衝序列包括任何順序之：使該基板暴露至包括一含鹵素氣體之一第一反應物氣體，及使該基板暴露至包括一烷基鋁之一第二反應物氣體。
根據另一實施例，該方法包含：在一處理腔室中提供一基板，該基板具有一外露第一材料層及一外露第二材料層；及使該基板暴露至一氣體脈衝序列以選擇性沉積一額外材料層在該外露第一材料層上、但不沉積在該外露第二材料層上，其中該氣體脈衝序列包括任何順序之：使該基板暴露至包括一含鹵素氣體之一第一反應物氣體，及使該基板暴露至包括一烷基鋁之一第二反應物氣體。
根據一實施例，使該基板暴露至該氣體脈衝序列係蝕刻該第二材料層。
3:圖案化基板
4:圖案化基板
101:第一反應物氣體脈衝
102:吹淨氣體脈衝
103:第二反應物氣體脈衝
104:吹淨氣體脈衝
300:膜
301:第二材料層
304:第一材料層
400:基層
401:材料
402:材料
403:材料
405:材料
406:膜
407,409,411:凹陷特徵部
伴隨的圖式被納入本說明書中並且構成本說明書之一部分，其繪示了本發明之實施例，並且與上述的發明內容及下述的實施方式一起用於解釋本發明。
圖1概要地顯示根據本發明之一實施例之用於處理基板之氣體脈衝序列； 圖2顯示根據本發明之實施例之處理基板之實驗結果；圖3A及3B概要地顯示根據本發明之一實施例之選擇性沉積及蝕刻；及圖4A及4B概要地顯示根據本發明之實施例之多色圖案化之選擇性沉積及蝕刻之示例方法。
本發明之實施例描述一方法，其包括使基板上之膜暴露至氣體脈衝序列。根據一實施例，該方法可用於進行含金屬層之熱蝕刻。根據另一實施例，該方法可用於選擇性蝕刻含金屬層，同時沉積材料在其它含金屬層上。該方法可整合至半導體製造中。在一範例中，熱蝕刻處理可整合至閘極堆疊形成及圖案化中。在另一範例中，熱蝕刻處理可用於精確的膜厚控制，以調整元件之功函數。
本發明之某些實施例描述用於蝕刻含金屬層之等向性熱原子層蝕刻(ALE)處理。含金屬材料之範例包括含Hf化合物、含Zr化合物、及含Ti化合物，含Hf化合物例如為鉿氧化物(例如HfO2)及鉿氮化物(例如HfN)，含Zr化合物例如為鋯氧化物(例如ZrO2)及鋯氮化物(例如ZrN)，含Ti化合物例如為鈦氧化物(例如TiO2)及鈦氮化物(例如TiN)。某些金屬氧化物(例如TiO2、HfO2、ZrO2)已被視為前景看好的高介電常數介電材料，用於先進的半導體元件。在一範例中，HfO2目前用於半導體元件中做為閘極介電材料。
根據一實施例，該方法包括，在一處理腔室中提供一基板，該基板具有含金屬層於其上，並且使該基板暴露至氣體脈衝序列，以在沒有電漿之情況下蝕刻該含金屬層，其中該氣體脈衝序列包括任何順序之：使該基板暴露至包括含鹵素氣體之第一反應物氣體，以及使該基板暴露至包括烷基鋁之第二反應物氣體。可重複氣體脈衝序列至少一次，以進一步蝕刻該含金屬層。根據一實施例，該方法更包括，在使基板暴露至第一反應物氣體與第二反應物氣體之步驟之間，利用惰性氣體以吹淨該處理腔室。
根據一實施例，含鹵素氣體包括鈦鹵化物，選自於由TiF4、TiCl4、TiBr4及TiI4所組成之群組。根據另一實施例，含鹵素氣體可選自於由SiCl4、BCl3及CCl4所組成之群組。根據一實施例，烷基鋁可選自於由三甲基鋁(AlMe3)、三乙基鋁(AlEt3)、三丙基鋁(AlPr3)及三丁基鋁(AlBu3)所組成之群組。其它實施例包括使用具有混合配位基之烷基鋁，例如AlMe2Et或AlMeEt2。根據某些實施例，基板溫度可在約200℃與小於500℃之間、或在約300℃與約400℃之間。暴露至含鹵素氣體及烷基鋁兩者可為飽和暴露，其使基板表面充滿含鹵素氣體及烷基鋁。
圖1概要地顯示根據本發明之一實施例之用於處理基板之氣體脈衝序列。氣體脈衝序列包括相繼的反應物氣體脈衝之循環而沒有電漿激發。每一循環包括第一反應物氣體脈衝101(包括含鹵素氣體)、吹淨氣體脈衝102(例如，Ar)、第二反應物氣體脈衝103(包括烷基鋁)、及吹淨氣體脈衝104(例如，Ar)。第一反應物脈衝101及第二反應物氣體脈衝103可更包括惰性氣體。根據另一實施例，可省略吹淨氣體脈衝102及104其中一或多者。
基板處理範例
根據本發明之一實施例，對基板上之TiN膜進行處理。使用TiCl4、Ar、AlMe3及Ar之相繼的暴露之複數循環，以對TiN膜進行處理。TiCl4脈衝長度為5秒，AlMe3脈衝長度為6秒。TiCl4脈衝及AlMe3脈衝兩者為飽和暴露，基板溫度為350℃。在0、50、150及250個循環後，藉由X射線光電子能譜(XPS)以量測TiN膜之厚度。TiN膜之蝕刻率為約0.1Å/循環。
根據本發明之一實施例，對基板上之HfO2膜進行處理。使用TiCl4、Ar、AlMe3及Ar之相繼的暴露之複數循環，以對HfO2膜進行處理。TiCl4脈衝長度為5秒，AlMe3脈衝長度為6秒。TiCl4脈衝及AlMe3脈衝兩者為飽和暴露，基板溫度為350℃。在0、20、50及100個循環後，藉由XPS以量測HfO2膜之厚度。HfO2之蝕刻率為約0.37Å/循環。
根據本發明之一實施例，對基板上之ZrO2膜進行處理。使用TiCl4、Ar、AlMe3及Ar之相繼的暴露之複數循環，以對ZrO2膜進行處理。TiCl4脈衝長度為5秒，AlMe3脈衝長度為6秒。TiCl4脈衝及AlMe3脈衝兩者為飽和暴露，基板溫度為350℃。在0、20、50及100個循環後，藉由XPS以量測ZrO2膜之厚度。ZrO2之蝕刻率為約0.5Å/循環。
圖2顯示根據本發明之實施例之處理基板之實驗結果。顯示上述之蝕刻TiN、HfO2及ZrO2膜之結果、以及對基板上之Al2O3膜進行處理之實驗結果。使用圖1所示之TiCl4、Ar、AlMe3及Ar之相繼的暴露之複數循環，以對Al2O3膜進行處理。TiCl4脈衝長度為5秒，AlMe3脈衝長度為6秒。基板溫度為350℃。圖2中之實驗結果顯示，HfO2膜、ZrO2膜及TiN被氣體暴露所蝕刻，然而Al2O3膜並未被蝕刻，且元素分析顯示TiAlOx材料沉積在Al2O3膜上。
根據一實施例，熱蝕刻處理可用於維持在對於硬遮罩沉積及垂直介電質生長之區域選擇性沉積中之選擇性。根據一實施例，起始基板可包括嵌入在介電材料中之含金屬材料。含金屬材料之範例包括金屬，例如鎢(W)、釕(Ru)、鈷(Co)及銅(Cu)。介電材料之範例可包括SiO2、SiON、SiN、SCN及旋塗氧化物。可使用H2暴露、退火及其組合以進行起始基板之預處理。接著，在一範例中，可使起始基板暴露至反應物氣體，反應物氣體形成有機化合物之自組裝單層在含金屬材料上，以促進在介電材料上之後續的加強選擇性沉積。接著，含金屬層可至少實質上選擇性沉積在介電材料上。在一範例中，可藉由原子層沉積(ALD)以沉積含金屬層。小量的額外含金屬層可沉積在含金屬材料上之成核位置處。額外含金屬層之量係小於含金屬層之量，但可能需要移除額外含金屬材料，以便維持在區域選擇性沉積中之選擇性。因此，可藉由上述之熱蝕刻處理以移除在含金屬材料上之額外含金屬層，熱蝕刻處理使用包括含鹵素氣體之第一反應物氣體、及包括烷基鋁之第二反應物氣體。接著，含金屬層之沉積及熱蝕刻可重複至少一次。
根據一實施例，熱蝕刻處理可用於功函數調整。在半導體元件中，對於電晶體操作而言，藉由設定臨限電壓(Vt)之功函數調整是關鍵的。用於控制功函數之一方法係透過閘極堆疊厚度。然而，隨著節點縮小，在元件上之可用空間是重大的問題，此可能需要具有複數閘極金屬之堆疊。在一範例中，元件半成品包括二閘極結構，具有初始含金屬層(例如，TiN)在高介電常數層或高介電常數氧化物(介電常數高於SiO2)上。該方法包括，藉由形成一圖案化遮罩層及接著實施上述之熱蝕刻處理，以從一閘極結構移除或薄化初始含金屬層。接著，可移除遮罩層及沉積額外含金屬層在基板上，藉此形成具有額外 含金屬層之第一閘極結構、以及具有初始含金屬層與額外含金屬層之第二閘極結構。可選擇初始含金屬層及額外含金屬層，俾使二閘極結構具有不同的功函數。在一範例中，初始與額外含金屬層之沉積及熱蝕刻處理可在相同的處理腔室中實施，使用相同或類似的基板溫度。
本發明之某些實施例提出一方法，用於進階圖案化應用之原位選擇性沉積及蝕刻。圖3A及3B概要地顯示根據本發明之一實施例之選擇性沉積及蝕刻。在一範例中，在圖3A中之圖案化基板3包括在膜300(例如，介電質)中之凹陷特徵部及第一材料層304(例如，Al2O3)，凹陷特徵部填充有第二材料層301(例如，TiN)，第一材料層304係選擇性形成在膜300上但不形成在第二材料層301上。圖3B顯示在使圖案化基板3暴露至氣體脈衝序列之後所產生的結構，氣體脈衝序列包括交替暴露至第一反應物氣體(包括含鹵素氣體)及第二反應物氣體(包括烷基鋁)。氣體脈衝暴露選擇性地沉積一TiAlOx層306在外露的第一材料層304上，但外露的第二材料層301被蝕刻以使第二材料層301凹陷。在一範例中，外露的第一材料層304包括Al金屬、Al2O3、AlN、或其組合。在一範例中，外露的第二材料層301包括TiO2、TiN、HfO2、HfN、ZrO2、ZrN、或其組合。
根據一實施例，提出用於多色圖案化(multicolor patterning)之選擇性沉積及蝕刻之方法。多色圖案化意指不同材料之選擇性蝕刻、及之後使用所產生的圖案以蝕刻一或更多下方層。可使用氣體脈衝序列以執行選擇性蝕刻及沉積，氣體脈衝序列包括交替暴露至第一反應物氣體(包括含鹵素氣體)及第二反應物氣體(包括烷基鋁)。
圖4A及4B概要地顯示根據本發明之實施例之多色圖案化之選擇性沉積及蝕刻之示例方法。在圖4A中，平坦化的圖案化基板4包括，由左到右，交替的材料402、401、402、403、402、405、402。該交替的材料亦可稱為ABACADA或多色(multicolor)。在一範例中，材料402包括Al2O3、材料401包括HfO2或ZrO2、材料403包括TiN、材料405包括TiO2。根據一實施例，基板4可暴露至氣體脈衝序列，氣體脈衝序列包括交替暴露至第一反應物氣體(包括含鹵素氣體)及第二反應物氣體(包括烷基鋁)以選擇性移除材料401(例如，HfO2)、部分蝕刻材料403(例如，TiN)及材料405(例如，TiO2)、以及選擇性沉積膜406(例如，TiAlOx)在材料402(例如，Al2O3)上。此選擇性沉積/蝕刻處理形成凹陷特徵部407、409及411，並且可取代複雜的微影圖案化步驟。可根據該新圖案(其中材料401(例如，HfO2)已經被選擇性移除)，藉由蝕刻下方層(亦即，基層400)而進一步處理所產生的基板4。
用於進階圖案化應用之原位選擇性沉積及熱蝕刻之多個實施例已加以描述。本發明之實施例之以上描述係呈現為說明及描述之目的。其並非期望為詳盡的或將本發明限制為所揭示之精確形式。此說明及以下的申請專利範圍包括僅用於描述目的且不應被理解為限制之術語。熟悉此項技藝者可理解，根據上述教示，許多修改和變化是可能的。熟悉此項技藝者將了解圖式中所示之各種構件之均等結合及取代。因此，本發明的範圍不受此詳細說明所限定，而是由隨附申請專利範圍所限定。
101‧‧‧第一反應物氣體脈衝
102‧‧‧吹淨氣體脈衝
103‧‧‧第二反應物氣體脈衝
104‧‧‧吹淨氣體脈衝

Claims (18)

  1. 一種處理基板之方法，該方法包含：在一處理腔室中提供一基板，該基板具有一含金屬層於其上；及使該基板暴露至一氣體脈衝序列以在沒有電漿之情況下蝕刻該含金屬層，其中該氣體脈衝序列包括任何順序之：使該基板暴露至一第一反應物氣體，該第一反應物氣體包括一含鹵素氣體，其中該含鹵素氣體包括一鈦鹵化物，該鈦鹵化物係選自於由TiF4、TiCl4、TiBr4、及TiI4所組成之群組，及使該基板暴露至一第二反應物氣體，該第二反應物氣體包括一烷基鋁。
  2. 如申請專利範圍第1項之處理基板之方法，其中該含金屬層包括TiO2、TiN、HfO2、HfN、ZrO2、ZrN、或其組合。
  3. 如申請專利範圍第1項之處理基板之方法，其中該烷基鋁係選自於由AlMe3、AlEt3、AlPr3、及AlBu3所組成之群組。
  4. 如申請專利範圍第1項之處理基板之方法，其中該基板之溫度係在約300℃與約500℃之間。
  5. 一種處理基板之方法，該方法包含：在一處理腔室中提供一基板，該基板具有一外露第一材料層及一外露第二材料層；及使該基板暴露至一氣體脈衝序列以選擇性沉積一額外材料層在該外露第一材料層上、但不沉積在該外露第二材料層上，其中該氣體脈衝序列包括任何順序之： 使該基板暴露至一第一反應物氣體，該第一反應物氣體包括一含鹵素氣體，其中該含鹵素氣體包括一鈦鹵化物，該鈦鹵化物係選自於由TiF4、TiCl4、TiBr4、及TiI4所組成之群組，及使該基板暴露至一第二反應物氣體，該第二反應物氣體包括一烷基鋁。
  6. 如申請專利範圍第5項之處理基板之方法，其中該外露第一材料層包括鋁。
  7. 如申請專利範圍第5項之處理基板之方法，其中該外露第一材料層包括鋁金屬、Al2O3、AlN、或其組合。
  8. 如申請專利範圍第5項之處理基板之方法，其中該含外露第二材料層包括TiO2、TiN、HfO2、HfN、ZrO2、ZrN、或其組合。
  9. 如申請專利範圍第5項之處理基板之方法，其中該烷基鋁係選自於由AlMe3、AlEt3、AlPr3、及Al(i-Bu)3所組成之群組。
  10. 如申請專利範圍第5項之處理基板之方法，其中該基板之溫度係在約300℃與約500℃之間。
  11. 如申請專利範圍第5項之處理基板之方法，其中該額外材料層包括TiAlOx。
  12. 如申請專利範圍第5項之處理基板之方法，其中使該基板暴露至該氣體脈衝序列係蝕刻該第二材料層。
  13. 一種處理基板之方法，該方法包含：在一處理腔室中提供一基板，該基板包括一外露含金屬材料及一外露介電材料； 沉積一含金屬層在該介電材料上及一額外含金屬層在該含金屬層上，其中該額外含金屬層之量係小於該含金屬層之量；及使該基板暴露至一氣體脈衝序列以在沒有電漿之情況下從該含金屬層移除該額外含金屬層，其中該氣體脈衝序列包括任何順序之：使該基板暴露至一第一反應物氣體，該第一反應物氣體包括一含鹵素氣體，及使該基板暴露至一第二反應物氣體，該第二反應物氣體包括一烷基鋁。
  14. 如申請專利範圍第13項之處理基板之方法，其中該含金屬層包括TiO2、TiN、HfO2、HfN、ZrO2、ZrN、或其組合。
  15. 如申請專利範圍第13項之處理基板之方法，其中該含鹵素氣體包括一鈦鹵化物，該鈦鹵化物係選自於由TiF4、TiCl4、TiBr4、及TiI4所組成之群組。
  16. 如申請專利範圍第13項之處理基板之方法，其中該烷基鋁係選自於由AlMe3、AlEt3、AlPr3、及Al(i-Bu)3所組成之群組。
  17. 如申請專利範圍第13項之處理基板之方法，其中該含金屬材料包括鋁金屬、Al2O3、AlN、或其組合。
  18. 如申請專利範圍第13項之處理基板之方法，其中該含鹵素氣體係選自於由SiCl4、BCl3、及CCl4所組成之群組。
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