JP7159044B2 - データ電圧レベルに従ってデータをバッファリングするための反比例電圧－遅延バッファ - Google Patents

データ電圧レベルに従ってデータをバッファリングするための反比例電圧－遅延バッファ Download PDF

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JP7159044B2
JP7159044B2 JP2018515039A JP2018515039A JP7159044B2 JP 7159044 B2 JP7159044 B2 JP 7159044B2 JP 2018515039 A JP2018515039 A JP 2018515039A JP 2018515039 A JP2018515039 A JP 2018515039A JP 7159044 B2 JP7159044 B2 JP 7159044B2
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data input
input signal
logic state
signal
control signal
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JP2018534819A5 (enExample
JP2018534819A (ja
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ジョシュア・ランス・パケット
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Pulse Circuits (AREA)
JP2018515039A 2015-09-24 2016-09-09 データ電圧レベルに従ってデータをバッファリングするための反比例電圧－遅延バッファ Active JP7159044B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/863,710 2015-09-24
US14/863,710 US9467143B1 (en) 2015-09-24 2015-09-24 Inversely proportional voltage-delay buffers for buffering data according to data voltage levels
PCT/US2016/051073 WO2017053090A1 (en) 2015-09-24 2016-09-09 Inversely proportional voltage-delay buffers for buffering data according to data voltage levels

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JP2018534819A JP2018534819A (ja) 2018-11-22
JP2018534819A5 JP2018534819A5 (enExample) 2019-10-03
JP7159044B2 true JP7159044B2 (ja) 2022-10-24

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JP2018515039A Active JP7159044B2 (ja) 2015-09-24 2016-09-09 データ電圧レベルに従ってデータをバッファリングするための反比例電圧－遅延バッファ

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US (2) US9467143B1 (enExample)
EP (1) EP3353894A1 (enExample)
JP (1) JP7159044B2 (enExample)
KR (1) KR102604585B1 (enExample)
CN (1) CN108141213B (enExample)
BR (1) BR112018005973B1 (enExample)
WO (1) WO2017053090A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9467143B1 (en) 2015-09-24 2016-10-11 Qualcomm Incorporated Inversely proportional voltage-delay buffers for buffering data according to data voltage levels
US10796729B2 (en) * 2019-02-05 2020-10-06 Micron Technology, Inc. Dynamic allocation of a capacitive component in a memory device
US10979049B2 (en) * 2019-05-03 2021-04-13 Taiwan Semiconductor Manufacturing Company Ltd. Logic buffer circuit and method
US11349458B1 (en) * 2021-09-22 2022-05-31 Microsoft Technology Licensing, Llc Transistor aging monitor circuit for increased stress-based aging compensation precision, and related methods

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KR100297715B1 (ko) * 1998-09-01 2001-08-07 윤종용 출력버퍼제어회로및출력제어신호발생방법
US6150862A (en) 1998-10-15 2000-11-21 Intel Corporation Stable delay buffer
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US7405606B2 (en) * 2006-04-03 2008-07-29 Intellectual Ventures Fund 27 Llc D flip-flop
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TWI445310B (zh) * 2010-12-27 2014-07-11 Au Optronics Corp 移位暫存器
WO2011157109A2 (zh) * 2011-05-30 2011-12-22 华为技术有限公司 一种i/o电路和集成电路
KR20130042244A (ko) 2011-10-18 2013-04-26 에스케이하이닉스 주식회사 신호 전달 회로 및 이를 포함하는 플립플롭 회로
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US9467143B1 (en) 2015-09-24 2016-10-11 Qualcomm Incorporated Inversely proportional voltage-delay buffers for buffering data according to data voltage levels

Also Published As

Publication number Publication date
KR20180058793A (ko) 2018-06-01
CN108141213A (zh) 2018-06-08
BR112018005973B1 (pt) 2023-04-25
US9467143B1 (en) 2016-10-11
US9667250B2 (en) 2017-05-30
WO2017053090A1 (en) 2017-03-30
KR102604585B1 (ko) 2023-11-20
BR112018005973A2 (pt) 2018-10-16
EP3353894A1 (en) 2018-08-01
JP2018534819A (ja) 2018-11-22
US20170093397A1 (en) 2017-03-30
CN108141213B (zh) 2021-07-09

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