JP7157301B2 - ウェーハの加工方法 - Google Patents

ウェーハの加工方法 Download PDF

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Publication number
JP7157301B2
JP7157301B2 JP2017213724A JP2017213724A JP7157301B2 JP 7157301 B2 JP7157301 B2 JP 7157301B2 JP 2017213724 A JP2017213724 A JP 2017213724A JP 2017213724 A JP2017213724 A JP 2017213724A JP 7157301 B2 JP7157301 B2 JP 7157301B2
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JP
Japan
Prior art keywords
wafer
tape
back surface
grinding
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017213724A
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English (en)
Japanese (ja)
Other versions
JP2019087604A (ja
JP2019087604A5 (https=
Inventor
陵佑 片岡
崇 田母神
修平 押田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Seimitsu Co Ltd
Original Assignee
Tokyo Seimitsu Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Seimitsu Co Ltd filed Critical Tokyo Seimitsu Co Ltd
Priority to JP2017213724A priority Critical patent/JP7157301B2/ja
Priority to KR1020207033283A priority patent/KR102520523B1/ko
Priority to PCT/JP2018/040067 priority patent/WO2019088011A1/ja
Priority to KR1020207012050A priority patent/KR20200049878A/ko
Publication of JP2019087604A publication Critical patent/JP2019087604A/ja
Priority to US16/867,126 priority patent/US11075071B2/en
Publication of JP2019087604A5 publication Critical patent/JP2019087604A5/ja
Priority to JP2022125778A priority patent/JP2022172109A/ja
Application granted granted Critical
Publication of JP7157301B2 publication Critical patent/JP7157301B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/123—Preparing bulk and homogeneous wafers by grinding or lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50—Working by transmitting the laser beam through or within the workpiece
    • B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
    • H10P14/6542—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light by using coherent radiation, e.g. using a laser
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0442—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H10P72/7404—Wafer tapes, e.g. grinding or dicing support tapes the wafer tape being a laminate of three or more layers, e.g. including additional layers beyond a base layer and an uppermost adhesive layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Oil, Petroleum & Natural Gas (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
JP2017213724A 2017-11-06 2017-11-06 ウェーハの加工方法 Active JP7157301B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2017213724A JP7157301B2 (ja) 2017-11-06 2017-11-06 ウェーハの加工方法
KR1020207033283A KR102520523B1 (ko) 2017-11-06 2018-10-29 웨이퍼의 가공 방법
PCT/JP2018/040067 WO2019088011A1 (ja) 2017-11-06 2018-10-29 ウェーハの加工方法
KR1020207012050A KR20200049878A (ko) 2017-11-06 2018-10-29 웨이퍼의 가공 방법
US16/867,126 US11075071B2 (en) 2017-11-06 2020-05-05 Method for processing wafer
JP2022125778A JP2022172109A (ja) 2017-11-06 2022-08-05 ウェーハの加工方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017213724A JP7157301B2 (ja) 2017-11-06 2017-11-06 ウェーハの加工方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2022125778A Division JP2022172109A (ja) 2017-11-06 2022-08-05 ウェーハの加工方法

Publications (3)

Publication Number Publication Date
JP2019087604A JP2019087604A (ja) 2019-06-06
JP2019087604A5 JP2019087604A5 (https=) 2021-04-15
JP7157301B2 true JP7157301B2 (ja) 2022-10-20

Family

ID=66331719

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2017213724A Active JP7157301B2 (ja) 2017-11-06 2017-11-06 ウェーハの加工方法
JP2022125778A Pending JP2022172109A (ja) 2017-11-06 2022-08-05 ウェーハの加工方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2022125778A Pending JP2022172109A (ja) 2017-11-06 2022-08-05 ウェーハの加工方法

Country Status (4)

Country Link
US (1) US11075071B2 (https=)
JP (2) JP7157301B2 (https=)
KR (2) KR20200049878A (https=)
WO (1) WO2019088011A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7460386B2 (ja) * 2020-02-14 2024-04-02 株式会社ディスコ 被加工物の加工方法
JP7824105B2 (ja) * 2022-03-04 2026-03-04 株式会社ディスコ 分割装置及びチップの製造方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243344A (ja) 2002-02-15 2003-08-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2012104644A (ja) 2010-11-10 2012-05-31 Tokyo Seimitsu Co Ltd ウェーハ破断方法およびウェーハ破断装置
JP2013004583A (ja) 2011-06-13 2013-01-07 Tokyo Seimitsu Co Ltd 半導体基板の切断方法及び半導体基板の切断装置
JP2014165462A (ja) 2013-02-27 2014-09-08 Lintec Corp 半導体チップの製造方法
JP2016225375A (ja) 2015-05-27 2016-12-28 デクセリアルズ株式会社 熱硬化性接着シート、及び半導体装置の製造方法
JP2017017163A (ja) 2015-06-30 2017-01-19 日亜化学工業株式会社 半導体素子の製造方法
JP2017098331A (ja) 2015-11-19 2017-06-01 日東電工株式会社 シート状樹脂組成物、積層シート及び半導体装置の製造方法
WO2017104670A1 (ja) 2015-12-14 2017-06-22 デクセリアルズ株式会社 熱硬化性接着シート、及び半導体装置の製造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3624909B2 (ja) 2002-03-12 2005-03-02 浜松ホトニクス株式会社 レーザ加工方法
TWI326626B (en) * 2002-03-12 2010-07-01 Hamamatsu Photonics Kk Laser processing method
US7241642B2 (en) * 2004-01-30 2007-07-10 Intel Corporation Mounting and dicing process for wafers
JP2007235068A (ja) * 2006-03-03 2007-09-13 Tokyo Seimitsu Co Ltd ウェーハ加工方法
JP5197037B2 (ja) 2008-01-30 2013-05-15 株式会社東京精密 バンプが形成されたウェーハを処理するウェーハ処理方法
JP2011054827A (ja) * 2009-09-03 2011-03-17 Fujitsu Semiconductor Ltd 半導体装置の製造方法及び表面保護テープ
JP5824365B2 (ja) 2012-01-16 2015-11-25 三星ダイヤモンド工業株式会社 脆性材料基板のブレイク方法
JP6061590B2 (ja) 2012-09-27 2017-01-18 株式会社ディスコ 表面保護部材および加工方法
JP6059499B2 (ja) * 2012-10-05 2017-01-11 リンテック株式会社 表面保護シート
US9230862B2 (en) * 2013-05-14 2016-01-05 Texas Instruments Incorporated Wafer die separation
JP5637330B1 (ja) * 2013-07-01 2014-12-10 富士ゼロックス株式会社 半導体片の製造方法、半導体片を含む回路基板および画像形成装置
JP6185792B2 (ja) * 2013-08-29 2017-08-23 三星ダイヤモンド工業株式会社 半導体ウエハの分断方法
JP6119551B2 (ja) 2013-10-16 2017-04-26 三星ダイヤモンド工業株式会社 弾性支持板、破断装置及び分断方法
JP6119550B2 (ja) 2013-10-16 2017-04-26 三星ダイヤモンド工業株式会社 エキスパンダ、破断装置及び分断方法
JP2016040079A (ja) 2014-08-12 2016-03-24 三星ダイヤモンド工業株式会社 脆性材料基板の分断方法及び分断装置
US11437275B2 (en) 2015-08-31 2022-09-06 Disco Corporation Method of processing wafer and protective sheeting for use in this method
JP2017079291A (ja) * 2015-10-21 2017-04-27 株式会社ディスコ ウエーハの加工方法
JP6621338B2 (ja) 2016-02-09 2019-12-18 株式会社ディスコ 被加工物の樹脂被覆方法及び被加工物の加工方法
US10453764B2 (en) * 2016-08-11 2019-10-22 Advanced Semiconductor Engineering, Inc. Molding for large panel fan-out package

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243344A (ja) 2002-02-15 2003-08-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2012104644A (ja) 2010-11-10 2012-05-31 Tokyo Seimitsu Co Ltd ウェーハ破断方法およびウェーハ破断装置
JP2013004583A (ja) 2011-06-13 2013-01-07 Tokyo Seimitsu Co Ltd 半導体基板の切断方法及び半導体基板の切断装置
JP2014165462A (ja) 2013-02-27 2014-09-08 Lintec Corp 半導体チップの製造方法
JP2016225375A (ja) 2015-05-27 2016-12-28 デクセリアルズ株式会社 熱硬化性接着シート、及び半導体装置の製造方法
JP2017017163A (ja) 2015-06-30 2017-01-19 日亜化学工業株式会社 半導体素子の製造方法
JP2017098331A (ja) 2015-11-19 2017-06-01 日東電工株式会社 シート状樹脂組成物、積層シート及び半導体装置の製造方法
WO2017104670A1 (ja) 2015-12-14 2017-06-22 デクセリアルズ株式会社 熱硬化性接着シート、及び半導体装置の製造方法

Also Published As

Publication number Publication date
US20200266047A1 (en) 2020-08-20
WO2019088011A1 (ja) 2019-05-09
KR102520523B1 (ko) 2023-04-12
US11075071B2 (en) 2021-07-27
KR20200133022A (ko) 2020-11-25
JP2019087604A (ja) 2019-06-06
KR20200049878A (ko) 2020-05-08
JP2022172109A (ja) 2022-11-15

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