JP7053055B2 - 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用 - Google Patents

光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用 Download PDF

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JP7053055B2
JP7053055B2 JP2019541084A JP2019541084A JP7053055B2 JP 7053055 B2 JP7053055 B2 JP 7053055B2 JP 2019541084 A JP2019541084 A JP 2019541084A JP 2019541084 A JP2019541084 A JP 2019541084A JP 7053055 B2 JP7053055 B2 JP 7053055B2
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islands
group
layer
relaxation
island
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JP2020512684A (ja
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デイビッド ソッタ，
オリビア ルドゥー，
オリビア ボニン，
ジーン―マーク ベソウ，
モルゲン ロギオウ，
ラファエル カルミロン，
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Soitec SA
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Soitec SA
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Priority claimed from FR1752230A external-priority patent/FR3064108B1/fr
Priority claimed from FR1852155A external-priority patent/FR3079070B1/fr
Priority claimed from FR1852156A external-priority patent/FR3079071B1/fr
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/817—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/8215—Bodies characterised by crystalline imperfections, e.g. dislocations; characterised by the distribution of dopants, e.g. delta-doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials

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  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2019541084A 2017-03-17 2018-03-14 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用 Active JP7053055B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2022048947A JP7322329B2 (ja) 2017-03-17 2022-03-24 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
FR1752230A FR3064108B1 (fr) 2017-03-17 2017-03-17 Substrat de croissance pour la formation de dispositifs optoelectroniques, procede de fabrication d'un tel susbstrat, et utilisation du susbtrat notamment dans le domaine des micro-ecrans d'affichage
FR1752230 2017-03-17
FR1852155A FR3079070B1 (fr) 2018-03-13 2018-03-13 Procede de fabrication d'une pluralite d'ilots semi-conducteurs cristallins presentant une variete de parametres de maille
FR1852156A FR3079071B1 (fr) 2018-03-13 2018-03-13 Procede de fabrication d'une pluralite d'ilots semi-conducteurs cristallins prensentant une variete de parametres de maille
FR1852156 2018-03-13
FR1852155 2018-03-13
PCT/FR2018/050606 WO2018167426A2 (fr) 2017-03-17 2018-03-14 Substrat de croissance pour la formation de dispositifs optoelectroniques, procede de fabrication d'un tel substrat, et utilisation du substrat notamment dans le domaine des micro-ecrans d'affichage

Related Child Applications (1)

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JP2022048947A Division JP7322329B2 (ja) 2017-03-17 2022-03-24 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用

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JP2020512684A JP2020512684A (ja) 2020-04-23
JP7053055B2 true JP7053055B2 (ja) 2022-04-12

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JP2019541084A Active JP7053055B2 (ja) 2017-03-17 2018-03-14 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用
JP2022048947A Active JP7322329B2 (ja) 2017-03-17 2022-03-24 光電子デバイスを形成するための成長基板、そのような基板を作製するための方法、及び特にマイクロディスプレイスクリーンの分野における基板の使用

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Country Link
US (1) US20210210653A1 (https=)
EP (2) EP4033531B1 (https=)
JP (2) JP7053055B2 (https=)
KR (1) KR102456048B1 (https=)
CN (1) CN110447100B (https=)
SG (1) SG11201908017RA (https=)
TW (1) TWI740015B (https=)
WO (1) WO2018167426A2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3103627B1 (fr) * 2019-11-25 2023-03-24 Soitec Silicon On Insulator Procede de production d'un substrat comprenant une etape de traitement thermique de relaxation
TWI905261B (zh) * 2021-09-09 2025-11-21 晶元光電股份有限公司 光電元件

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006049673A (ja) 2004-08-06 2006-02-16 Seiko Epson Corp 半導体基板、半導体装置、半導体基板の製造方法および半導体装置の製造方法
US20080169508A1 (en) 2007-01-11 2008-07-17 International Business Machines Corporation Stressed soi fet having doped glass box layer
JP2009055016A (ja) 2007-08-16 2009-03-12 Sharp Corp 半導体デバイスおよびその製造方法
JP2011530181A (ja) 2008-08-06 2011-12-15 エス． オー． アイ． テック シリコン オン インシュレーター テクノロジーズ 歪み層の緩和

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2751963B2 (ja) * 1992-06-10 1998-05-18 日亜化学工業株式会社 窒化インジウムガリウム半導体の成長方法
EP0786149B1 (en) * 1994-10-11 2000-07-26 International Business Machines Corporation Monolithic array of light emitting diodes for the generation of light at multiple wavelengths and its use for multicolor display applications
US20020136932A1 (en) * 2001-03-21 2002-09-26 Seikoh Yoshida GaN-based light emitting device
JP2004022969A (ja) 2002-06-19 2004-01-22 Nippon Telegr & Teleph Corp <Ntt> 半導体発光素子
CN101540357B (zh) * 2008-03-19 2010-09-01 中国科学院半导体研究所 控制自组织铟镓砷量子点成核的生长方法
EP2151852B1 (en) * 2008-08-06 2020-01-15 Soitec Relaxation and transfer of strained layers
EP2151856A1 (en) * 2008-08-06 2010-02-10 S.O.I. TEC Silicon Relaxation of strained layers
FR2936903B1 (fr) 2008-10-07 2011-01-14 Soitec Silicon On Insulator Relaxation d'une couche de materiau contraint avec application d'un raidisseur
CN102203904B (zh) * 2008-10-30 2013-11-20 S.O.I.探测硅绝缘技术公司 形成具有减小的晶格应变的半导体材料层、半导体结构、装置的方法及包含具有减小的晶格应变的半导体材料层、半导体结构、装置的工程衬底
KR101081169B1 (ko) * 2010-04-05 2011-11-07 엘지이노텍 주식회사 발광 소자 및 그 제조방법, 발광 소자 패키지, 조명 시스템
WO2011145283A1 (ja) 2010-05-20 2011-11-24 パナソニック株式会社 窒化物半導体発光素子および窒化物半導体発光素子の製造方法
FR2992465B1 (fr) 2012-06-22 2015-03-20 Soitec Silicon On Insulator Procede de fabrication collective de leds et structure pour la fabrication collective de leds
FR2992466A1 (fr) 2012-06-22 2013-12-27 Soitec Silicon On Insulator Procede de realisation de contact pour led et structure resultante
DE112014001385T5 (de) 2013-03-15 2015-12-17 Soitec Halbleiterlichtemitterstruktur mit einem aktiven Gebiet, das InGaN enthält, und Verfahren für seine Herstellung

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006049673A (ja) 2004-08-06 2006-02-16 Seiko Epson Corp 半導体基板、半導体装置、半導体基板の製造方法および半導体装置の製造方法
US20080169508A1 (en) 2007-01-11 2008-07-17 International Business Machines Corporation Stressed soi fet having doped glass box layer
JP2009055016A (ja) 2007-08-16 2009-03-12 Sharp Corp 半導体デバイスおよびその製造方法
JP2011530181A (ja) 2008-08-06 2011-12-15 エス． オー． アイ． テック シリコン オン インシュレーター テクノロジーズ 歪み層の緩和

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Publication number Publication date
EP4033531A1 (fr) 2022-07-27
SG11201908017RA (en) 2019-10-30
EP4033531B1 (fr) 2023-08-02
KR102456048B1 (ko) 2022-10-19
US20210210653A1 (en) 2021-07-08
JP7322329B2 (ja) 2023-08-08
CN110447100B (zh) 2023-07-18
EP3596756B1 (fr) 2023-02-15
JP2022087136A (ja) 2022-06-09
TW201903830A (zh) 2019-01-16
JP2020512684A (ja) 2020-04-23
TWI740015B (zh) 2021-09-21
KR20190123347A (ko) 2019-10-31
WO2018167426A2 (fr) 2018-09-20
WO2018167426A3 (fr) 2018-11-22
CN110447100A (zh) 2019-11-12
EP3596756A2 (fr) 2020-01-22

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