JP6926012B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6926012B2 JP6926012B2 JP2018024047A JP2018024047A JP6926012B2 JP 6926012 B2 JP6926012 B2 JP 6926012B2 JP 2018024047 A JP2018024047 A JP 2018024047A JP 2018024047 A JP2018024047 A JP 2018024047A JP 6926012 B2 JP6926012 B2 JP 6926012B2
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- conductive
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/512—Disposition of the gate electrodes, e.g. buried gates
- H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0295—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the source electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
- H10D64/2527—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/141—VDMOS having built-in components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/141—VDMOS having built-in components
- H10D84/143—VDMOS having built-in components the built-in components being PN junction diodes
- H10D84/144—VDMOS having built-in components the built-in components being PN junction diodes in antiparallel diode configurations
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018024047A JP6926012B2 (ja) | 2018-02-14 | 2018-02-14 | 半導体装置 |
| US16/033,371 US10847648B2 (en) | 2018-02-14 | 2018-07-12 | Semiconductor device |
| CN201810762478.6A CN110164971B (zh) | 2018-02-14 | 2018-07-12 | 半导体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018024047A JP6926012B2 (ja) | 2018-02-14 | 2018-02-14 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019140310A JP2019140310A (ja) | 2019-08-22 |
| JP2019140310A5 JP2019140310A5 (enExample) | 2020-03-26 |
| JP6926012B2 true JP6926012B2 (ja) | 2021-08-25 |
Family
ID=67540256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018024047A Active JP6926012B2 (ja) | 2018-02-14 | 2018-02-14 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10847648B2 (enExample) |
| JP (1) | JP6926012B2 (enExample) |
| CN (1) | CN110164971B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6864640B2 (ja) * | 2018-03-19 | 2021-04-28 | 株式会社東芝 | 半導体装置及びその制御方法 |
| JP7164497B2 (ja) * | 2019-08-23 | 2022-11-01 | 株式会社東芝 | 半導体装置 |
| CN111739936B (zh) * | 2020-08-07 | 2020-11-27 | 中芯集成电路制造(绍兴)有限公司 | 一种半导体器件及其形成方法 |
| JP7447769B2 (ja) * | 2020-11-13 | 2024-03-12 | 三菱電機株式会社 | 半導体素子、半導体装置 |
| JP7486407B2 (ja) * | 2020-11-27 | 2024-05-17 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
| CN117121213A (zh) * | 2021-03-26 | 2023-11-24 | 罗姆股份有限公司 | 半导体装置 |
| JP7728216B6 (ja) * | 2022-03-23 | 2025-09-19 | 株式会社東芝 | 半導体装置 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4830360B2 (ja) | 2005-06-17 | 2011-12-07 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP2010010263A (ja) | 2008-06-25 | 2010-01-14 | Panasonic Corp | 縦型半導体装置 |
| JP5422930B2 (ja) | 2008-06-30 | 2014-02-19 | 株式会社デンソー | 半導体装置 |
| US8022470B2 (en) * | 2008-09-04 | 2011-09-20 | Infineon Technologies Austria Ag | Semiconductor device with a trench gate structure and method for the production thereof |
| WO2011111500A1 (ja) * | 2010-03-09 | 2011-09-15 | 富士電機システムズ株式会社 | 半導体装置 |
| JP5287835B2 (ja) * | 2010-04-22 | 2013-09-11 | 株式会社デンソー | 半導体装置 |
| US8716746B2 (en) * | 2010-08-17 | 2014-05-06 | Denso Corporation | Semiconductor device |
| JP6392133B2 (ja) * | 2015-01-28 | 2018-09-19 | 株式会社東芝 | 半導体装置 |
| JP6334438B2 (ja) * | 2015-03-10 | 2018-05-30 | 株式会社東芝 | 半導体装置 |
| JP6445952B2 (ja) * | 2015-10-19 | 2018-12-26 | 株式会社東芝 | 半導体装置 |
| US9530882B1 (en) * | 2015-11-17 | 2016-12-27 | Force Mos Technology Co., Ltd | Trench MOSFET with shielded gate and diffused drift region |
| US20170317207A1 (en) * | 2016-04-29 | 2017-11-02 | Force Mos Technology Co., Ltd. | Trench mosfet structure and layout with separated shielded gate |
| JP6677613B2 (ja) | 2016-09-15 | 2020-04-08 | 株式会社東芝 | 半導体装置 |
-
2018
- 2018-02-14 JP JP2018024047A patent/JP6926012B2/ja active Active
- 2018-07-12 CN CN201810762478.6A patent/CN110164971B/zh active Active
- 2018-07-12 US US16/033,371 patent/US10847648B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2019140310A (ja) | 2019-08-22 |
| US20190252541A1 (en) | 2019-08-15 |
| US10847648B2 (en) | 2020-11-24 |
| CN110164971B (zh) | 2022-08-12 |
| CN110164971A (zh) | 2019-08-23 |
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