JP6920219B2 - 酸化ケイ素膜の選択的堆積 - Google Patents
酸化ケイ素膜の選択的堆積 Download PDFInfo
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- JP6920219B2 JP6920219B2 JP2017567078A JP2017567078A JP6920219B2 JP 6920219 B2 JP6920219 B2 JP 6920219B2 JP 2017567078 A JP2017567078 A JP 2017567078A JP 2017567078 A JP2017567078 A JP 2017567078A JP 6920219 B2 JP6920219 B2 JP 6920219B2
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- silicon oxide
- oxide layer
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- selectively
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
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- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
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- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/053—Oxides composed of metals from groups of the periodic table
- H01L2924/0544—14th Group
- H01L2924/05442—SiO2
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- Plasma & Fusion (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562185388P | 2015-06-26 | 2015-06-26 | |
| US62/185,388 | 2015-06-26 | ||
| PCT/US2016/035302 WO2016209570A1 (en) | 2015-06-26 | 2016-06-01 | Selective deposition of silicon oxide films |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018524814A JP2018524814A (ja) | 2018-08-30 |
| JP2018524814A5 JP2018524814A5 (enExample) | 2019-07-11 |
| JP6920219B2 true JP6920219B2 (ja) | 2021-08-18 |
Family
ID=57586127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017567078A Active JP6920219B2 (ja) | 2015-06-26 | 2016-06-01 | 酸化ケイ素膜の選択的堆積 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10176980B2 (enExample) |
| JP (1) | JP6920219B2 (enExample) |
| KR (1) | KR102377376B1 (enExample) |
| CN (2) | CN107660307B (enExample) |
| TW (1) | TWI716414B (enExample) |
| WO (1) | WO2016209570A1 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10176984B2 (en) * | 2017-02-14 | 2019-01-08 | Lam Research Corporation | Selective deposition of silicon oxide |
| US10242866B2 (en) | 2017-03-08 | 2019-03-26 | Lam Research Corporation | Selective deposition of silicon nitride on silicon oxide using catalytic control |
| US10043656B1 (en) * | 2017-03-10 | 2018-08-07 | Lam Research Corporation | Selective growth of silicon oxide or silicon nitride on silicon surfaces in the presence of silicon oxide |
| US9911595B1 (en) | 2017-03-17 | 2018-03-06 | Lam Research Corporation | Selective growth of silicon nitride |
| US10559461B2 (en) | 2017-04-19 | 2020-02-11 | Lam Research Corporation | Selective deposition with atomic layer etch reset |
| JP7203515B2 (ja) * | 2017-06-06 | 2023-01-13 | アプライド マテリアルズ インコーポレイテッド | 連続した堆積-エッチング-処理方法を使用した酸化ケイ素及び窒化ケイ素のボトムアップ成長 |
| US10460930B2 (en) | 2017-11-22 | 2019-10-29 | Lam Research Corporation | Selective growth of SiO2 on dielectric surfaces in the presence of copper |
| WO2019169335A1 (en) | 2018-03-02 | 2019-09-06 | Lam Research Corporation | Selective deposition using hydrolysis |
| US10354859B1 (en) * | 2018-03-14 | 2019-07-16 | Sandisk Technologies Llc | Three-dimensional resistive random access memory device containing selectively grown amorphous silicon-containing barrier and method of making the same |
| CN113227909B (zh) | 2018-12-20 | 2025-07-04 | 朗姆研究公司 | 抗蚀剂的干式显影 |
| TWI869221B (zh) | 2019-06-26 | 2025-01-01 | 美商蘭姆研究公司 | 利用鹵化物化學品的光阻顯影 |
| KR20250007037A (ko) | 2020-01-15 | 2025-01-13 | 램 리써치 코포레이션 | 포토레지스트 부착 및 선량 감소를 위한 하부층 |
| CN116626993A (zh) | 2020-07-07 | 2023-08-22 | 朗姆研究公司 | 用于图案化辐射光致抗蚀剂图案化的集成干燥工艺 |
| JP7562696B2 (ja) | 2020-11-13 | 2024-10-07 | ラム リサーチ コーポレーション | フォトレジストのドライ除去用プロセスツール |
| KR20240042456A (ko) * | 2021-09-29 | 2024-04-02 | 가부시키가이샤 코쿠사이 엘렉트릭 | 기판 처리 방법, 반도체 장치의 제조 방법, 기판 처리 장치 및 프로그램 |
| US11978625B2 (en) | 2021-10-18 | 2024-05-07 | Applied Materials, Inc. | Methods of forming metal nitride films |
| US12474640B2 (en) | 2023-03-17 | 2025-11-18 | Lam Research Corporation | Integration of dry development and etch processes for EUV patterning in a single process chamber |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08213382A (ja) * | 1995-02-02 | 1996-08-20 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JPH11307625A (ja) * | 1998-04-24 | 1999-11-05 | Hitachi Ltd | 半導体装置およびその製造方法 |
| US6413826B2 (en) * | 1999-04-07 | 2002-07-02 | Vantis Corporation | Gate insulator process for nanometer MOSFETS |
| US6235354B1 (en) * | 1999-11-01 | 2001-05-22 | United Microelectronics Corp. | Method of forming a level silicon oxide layer on two regions of different heights on a semiconductor wafer |
| JP3344397B2 (ja) * | 2000-01-21 | 2002-11-11 | 日本電気株式会社 | 半導体装置の製造方法 |
| US6429092B1 (en) | 2000-06-19 | 2002-08-06 | Infineon Technologies Ag | Collar formation by selective oxide deposition |
| US6541401B1 (en) * | 2000-07-31 | 2003-04-01 | Applied Materials, Inc. | Wafer pretreatment to decrease rate of silicon dioxide deposition on silicon nitride compared to silicon substrate |
| US6444528B1 (en) | 2000-08-16 | 2002-09-03 | Fairchild Semiconductor Corporation | Selective oxide deposition in the bottom of a trench |
| US6503851B2 (en) | 2000-08-31 | 2003-01-07 | Micron Technology, Inc. | Use of linear injectors to deposit uniform selective ozone TEOS oxide film by pulsing reactants on and off |
| US6368986B1 (en) | 2000-08-31 | 2002-04-09 | Micron Technology, Inc. | Use of selective ozone TEOS oxide to create variable thickness layers and spacers |
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-
2016
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- 2016-06-01 CN CN202111288200.8A patent/CN114121605B/zh active Active
- 2016-06-01 WO PCT/US2016/035302 patent/WO2016209570A1/en not_active Ceased
- 2016-06-01 JP JP2017567078A patent/JP6920219B2/ja active Active
- 2016-06-01 KR KR1020187002530A patent/KR102377376B1/ko active Active
- 2016-06-17 US US15/185,282 patent/US10176980B2/en active Active
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|---|---|
| US10176980B2 (en) | 2019-01-08 |
| CN107660307B (zh) | 2021-11-05 |
| KR20180014204A (ko) | 2018-02-07 |
| KR102377376B1 (ko) | 2022-03-21 |
| JP2018524814A (ja) | 2018-08-30 |
| TWI716414B (zh) | 2021-01-21 |
| CN114121605B (zh) | 2025-09-30 |
| WO2016209570A1 (en) | 2016-12-29 |
| US20170004974A1 (en) | 2017-01-05 |
| CN107660307A (zh) | 2018-02-02 |
| CN114121605A (zh) | 2022-03-01 |
| TW201710539A (zh) | 2017-03-16 |
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