JP6908160B2 - 炭化珪素エピタキシャル基板、炭化珪素半導体装置の製造方法および炭化珪素半導体装置 - Google Patents
炭化珪素エピタキシャル基板、炭化珪素半導体装置の製造方法および炭化珪素半導体装置 Download PDFInfo
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- JP6908160B2 JP6908160B2 JP2020085444A JP2020085444A JP6908160B2 JP 6908160 B2 JP6908160 B2 JP 6908160B2 JP 2020085444 A JP2020085444 A JP 2020085444A JP 2020085444 A JP2020085444 A JP 2020085444A JP 6908160 B2 JP6908160 B2 JP 6908160B2
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Description
最初に本開示の実施態様を列記して説明する。以下の説明では、同一または対応する要素には同一の符号を付し、それらについて同じ説明は繰り返さない。また本明細書の結晶学的記載においては、個別方位を[]、集合方位を<>、個別面を()、集合面を{}でそれぞれ示す。ここで結晶学上の指数が負であることは、通常、数字の上に”−”(バー)を付すことによって表現されるが、本明細書では数字の前に負の符号を付すことによって結晶学上の負の指数を表現する。また「平面視」とは、エピタキシャル層の表面をその法線方向から見た視野を示す。
〔5〕上記〔1〕において、第2層は、CMPにおける化学反応の触媒となる元素を含有していてもよい。
以下、本開示の一実施形態(以下「本実施形態」と記す。)について説明するが、本開示の実施形態はこれらに限定されるものではない。
図1は、本実施形態に係る炭化珪素エピタキシャル基板(第1炭化珪素エピタキシャル基板100および第2炭化珪素エピタキシャル基板101)の製造方法の概略を示すフローチャートである。図1に示すように、当該製造方法は、第1層形成工程(S1)および第2層形成工程(S2)を備える。当該製造方法は、第2層形成工程(S2)の後に研磨工程(S3)をさらに備えていてもよい。以下、各工程について説明する。
図2は、第1層形成工程(S1)および第2層形成工程(S2)を図解する概略断面図である。第1層形成工程(S1)では、炭化珪素単結晶基板10上に、第1層11をホモエピタキシャル成長させる。炭化珪素単結晶基板10は、たとえば炭化珪素のバルク単結晶をスライスすることにより準備される。スライスには、たとえばワイヤーソーを使用できる。炭化珪素のポリタイプは4H−SiCが望ましい。4H−SiCは、電子移動度、絶縁耐力等において他のポリタイプより優れている。炭化珪素単結晶基板10の導電型は、たとえばn型でよい。炭化珪素単結晶基板10の口径は、100mm以上でもよいし、150mm以上でもよいし、300mm以下でもよい。
第2層形成工程(S2)では、第1層11の最表面に、第1層11と化学組成もしくは密度が異なる第2層12を形成する。第2層12は、第1層11の表面にエピタキシャル成長させてもよいし、第1層11の一部を変質させて形成してもよい。
研磨工程(S3)では、CMPによって、第2層12を研磨する。研磨工程(S3)では、第2層12を完全に除去してもよいし、第2層12の一部を残存させてもよい。研磨工程(S3)における研磨量は、好ましくは第2層12の厚さと同程度とする。CMPの砥粒は、たとえばコロイダルシリカ、フュームドシリカ、アルミナ等でよい。CMPの研磨液は、たとえば過酸化水素水等の酸化剤を含むものでもよい。前述のようにCMPに適した組成等を有する第2層12に対して、CMPを行うことにより、算術平均粗さを0.1nm以下まで低減し、なおかつ欠陥密度を低減できる可能性がある。CMP後、第2炭化珪素エピタキシャル基板101を純水、酸、アルカリ等で洗浄してもよい。
次に上記の製造方法によって製造された第1炭化珪素エピタキシャル基板100および第2炭化珪素エピタキシャル基板101について説明する。
図2に示す第1炭化珪素エピタキシャル基板100は、前述の第1層形成工程(S1)および第2層形成工程(S2)を経て製造された基板である。第1炭化珪素エピタキシャル基板100は、炭化珪素単結晶基板10と、炭化珪素単結晶基板10上に形成されているエピタキシャル層である第1層11と、第1層11の最表面に形成されている第2層12とを備える。第2層12は、第1層11と化学組成もしくは密度が異なる。第1層11の厚さに対する第2層12の厚さの比率は、0%を超えて10%以下である。
図5は、本実施形態に係る第2炭化珪素エピタキシャル基板101の構成の一例を示す概略断面図である。図5に示す第2炭化珪素エピタキシャル基板101は、前述の第1層形成工程(S1)〜研磨工程(S3)を経て製造された基板である。第2炭化珪素エピタキシャル基板101は、炭化珪素単結晶基板10と、炭化珪素単結晶基板10上に形成されているエピタキシャル層13とを備える。ここでエピタキシャル層13は、前述の第1層11に相当する。第2炭化珪素エピタキシャル基板101では、前述の第2層12がCMPにより実質的に除去されている。第2炭化珪素エピタキシャル基板101は、優れた表面性状を有する。
以下、上記の第2炭化珪素エピタキシャル基板101を用いた炭化珪素半導体装置1000について説明する。ここでは、MOSFET(Metal Oxide Semiconductor Field Effect Transistor)を例にとって説明する。ただし本実施形態はMOSFETに限定されない。本実施形態は、たとえばIGBT(Insulated Gate Bipolar Transistor)等に適用してもよい。
基板準備工程(S10)では、前述した第1層形成工程(S1)、第2層形成工程(S2)および研磨工程(S3)によって、第2炭化珪素エピタキシャル基板101を製造し、準備する(たとえば図1等を参照のこと)。
図11は、不純物領域形成工程(S20)を図解する概略断面図である。図11に示すように、第2炭化珪素エピタキシャル基板101は、第1主面91と、第1主面91の反対側に位置する第2主面92とを有する炭化珪素単結晶基板10と、第1主面91上に形成されており、炭化珪素単結晶基板10が位置する側の反対側に第3主面93を有するエピタキシャル層13とを含む。
図12は、酸化珪素膜形成工程(S30)を図解する概略断面図である。この工程では、図12に示すように、第3主面93上に酸化珪素膜35が形成される。酸化珪素膜35は、たとえば二酸化珪素等から構成される。酸化珪素膜35は、ゲート絶縁膜として機能する。酸化珪素膜35は、たとえば熱酸化により形成してもよい。熱酸化における雰囲気は、酸素雰囲気等でよい。熱酸化における熱処理温度は、たとえば1300℃程度でよい。熱酸化における熱処理時間は、たとえば30分程度でよい。
図13は、炭化珪素半導体装置1000の構成の一例を示す概略断面図である。第3電極43は、たとえばCVD法によって、酸化珪素膜35上に形成される。第3電極43は、ゲート電極として機能する。第3電極43は、たとえば不純物が添加され導電性を有するポリシリコン等から構成してもよい。
次に、本実施形態に係る炭化珪素半導体装置1000について説明する。図13に示す炭化珪素半導体装置1000は、いわゆるプレーナ構造を有する縦型MOSFETである。本実施形態において、チップサイズ、すなわち図13に示す断面構造部をユニットセル構造として含むMOSFETの有効面積は、たとえば1mm2〜100mm2程度である。
〔定電流TDDB測定〕
次に、本実施形態に従う炭化珪素半導体装置1000における定電流TDDBの測定結果を説明する。
Claims (3)
- 炭化珪素単結晶基板と、
前記炭化珪素単結晶基板上に形成されているエピタキシャル層と、を備え、
前記炭化珪素単結晶基板の口径は、100mm以上であり、
前記エピタキシャル層の表面における算術平均粗さは、0.1nm以下であり、
前記表面において、
キャロット欠陥の欠陥密度が0.1個/cm2以下であり、
台形状の窪みである台形状欠陥の欠陥密度が0.1個/cm2以下であり、
前記台形状欠陥は、平面視において<11−20>方向と交差する上底部および下底部を含み、
前記上底部の幅は、0.1μm以上100μm以下であり、前記下底部の幅は、50μm以上5000μm以下であり、
前記上底部は、突起部を含み、前記下底部は、複数のステップバンチングを含む、炭化珪素エピタキシャル基板。 - 請求項1に記載の炭化珪素エピタキシャル基板を準備する工程と、
前記エピタキシャル層上に酸化珪素膜を形成する工程と、を備える、炭化珪素半導体装置の製造方法。 - 第1主面と、前記第1主面の反対側に位置する第2主面とを有する炭化珪素単結晶基板と、前記第1主面上に形成されており、前記炭化珪素単結晶基板が位置する側の反対側に第3主面を有するエピタキシャル層とを含む、炭化珪素エピタキシャル基板と、
前記第3主面上に形成されている酸化珪素膜と、
前記第3主面側に接続されている第1電極と、
前記第2主面側に接続されている第2電極と、を備え、
前記炭化珪素エピタキシャル基板は、請求項1に記載の炭化珪素エピタキシャル基板であり、
前記酸化珪素膜の厚さは、10nm以上100nm以下であり、
25℃環境、20mA/cm2の一定電流密度で行われる、経時絶縁破壊測定における絶縁破壊電荷総量が60C/cm2以上である、炭化珪素半導体装置。
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CN107430995A (zh) | 2017-12-01 |
CN111799324A (zh) | 2020-10-20 |
JP2021165229A (ja) | 2021-10-14 |
JP6708974B2 (ja) | 2020-06-10 |
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