JP6870003B2 - 集積回路のためのパッケージングにおける又は関連する改善 - Google Patents

集積回路のためのパッケージングにおける又は関連する改善 Download PDF

Info

Publication number
JP6870003B2
JP6870003B2 JP2018560621A JP2018560621A JP6870003B2 JP 6870003 B2 JP6870003 B2 JP 6870003B2 JP 2018560621 A JP2018560621 A JP 2018560621A JP 2018560621 A JP2018560621 A JP 2018560621A JP 6870003 B2 JP6870003 B2 JP 6870003B2
Authority
JP
Japan
Prior art keywords
layer
film
sensing
analyzer according
isfets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018560621A
Other languages
English (en)
Japanese (ja)
Other versions
JP2019516992A5 (enExample
JP2019516992A (ja
Inventor
アンサリ,ザヒド
Original Assignee
ディーエヌエーイー グループ ホールディングス リミテッド
ディーエヌエーイー グループ ホールディングス リミテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ディーエヌエーイー グループ ホールディングス リミテッド, ディーエヌエーイー グループ ホールディングス リミテッド filed Critical ディーエヌエーイー グループ ホールディングス リミテッド
Publication of JP2019516992A publication Critical patent/JP2019516992A/ja
Publication of JP2019516992A5 publication Critical patent/JP2019516992A5/ja
Application granted granted Critical
Publication of JP6870003B2 publication Critical patent/JP6870003B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • G01N27/4148Integrated circuits therefor, e.g. fabricated by CMOS processing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Electrochemistry (AREA)
  • Pathology (AREA)
  • Molecular Biology (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Apparatus Associated With Microorganisms And Enzymes (AREA)
  • Micromachines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Investigating Or Analyzing Materials By The Use Of Fluid Adsorption Or Reactions (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Semiconductor Memories (AREA)
JP2018560621A 2016-05-18 2017-05-15 集積回路のためのパッケージングにおける又は関連する改善 Active JP6870003B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1608758.7 2016-05-18
GBGB1608758.7A GB201608758D0 (en) 2016-05-18 2016-05-18 Improvements in or relating to packaging for integrated circuits
PCT/GB2017/051352 WO2017199009A1 (en) 2016-05-18 2017-05-15 Improvements in or relating to packaging for integrated circuits

Publications (3)

Publication Number Publication Date
JP2019516992A JP2019516992A (ja) 2019-06-20
JP2019516992A5 JP2019516992A5 (enExample) 2021-04-08
JP6870003B2 true JP6870003B2 (ja) 2021-05-12

Family

ID=56320613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018560621A Active JP6870003B2 (ja) 2016-05-18 2017-05-15 集積回路のためのパッケージングにおける又は関連する改善

Country Status (7)

Country Link
US (1) US10634642B2 (enExample)
EP (1) EP3458851A1 (enExample)
JP (1) JP6870003B2 (enExample)
CN (1) CN109416340B (enExample)
CA (1) CA3022281A1 (enExample)
GB (1) GB201608758D0 (enExample)
WO (1) WO2017199009A1 (enExample)

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676042A (en) * 1979-11-28 1981-06-23 Shindengen Electric Mfg Co Ltd Field effect transistor for ion sensor
GB2096825A (en) 1981-04-09 1982-10-20 Sibbald Alastair Chemical sensitive semiconductor field effect transducer
JPS6056247A (ja) * 1983-09-07 1985-04-01 Mitsubishi Electric Corp 半導体イオンセンサの絶縁法
JPS6073352A (ja) * 1983-09-30 1985-04-25 Hitachi Ltd 化学fetセンサ
JP2988020B2 (ja) * 1991-07-03 1999-12-06 日本電気株式会社 半導体イオンセンサ
JP4450031B2 (ja) * 2007-08-22 2010-04-14 株式会社デンソー 半導体部品
US7759135B2 (en) * 2008-09-30 2010-07-20 Infineon Technologies Ag Method of forming a sensor node module
DE102009002060B4 (de) * 2009-03-31 2023-08-03 Endress+Hauser Conducta Gmbh+Co. Kg Ionensensitiver Sensor mit Mehrfachschichtaufbau im sensitiven Bereich sowie Verfahren zur Herstellung eines solchen Sensors
FR2991053B1 (fr) * 2012-05-25 2014-06-06 Hemodia Capteur isfet avec dispositif de controle integre.
EP2677307B1 (en) * 2012-06-21 2016-05-11 Nxp B.V. Integrated circuit with sensors and manufacturing method
GB2508582A (en) * 2012-10-12 2014-06-11 Dna Electronics Ltd ISFET with Titanium Nitride layer
US9395326B2 (en) * 2013-11-01 2016-07-19 Taiwan Semiconductor Manufacturing Company Limited FET sensing cell and method of improving sensitivity of the same
TWI600901B (zh) * 2015-09-14 2017-10-01 友達光電股份有限公司 離子感測場效電晶體
US9470652B1 (en) * 2015-09-15 2016-10-18 Freescale Semiconductor, Inc. Sensing field effect transistor devices and method of their manufacture

Also Published As

Publication number Publication date
EP3458851A1 (en) 2019-03-27
CN109416340A (zh) 2019-03-01
US10634642B2 (en) 2020-04-28
US20190302051A1 (en) 2019-10-03
CN109416340B (zh) 2021-08-27
JP2019516992A (ja) 2019-06-20
CA3022281A1 (en) 2017-11-23
WO2017199009A1 (en) 2017-11-23
GB201608758D0 (en) 2016-06-29

Similar Documents

Publication Publication Date Title
US10395928B2 (en) Depositing a passivation layer on a graphene sheet
CN101641776B (zh) 半导体器件
CN102646644B (zh) 具有传感器的集成电路和制造这种集成电路的方法
US10381277B2 (en) Method for producing a plurality of measurement regions on a chip, and chip with measurement regions
US9766195B2 (en) Integrated circuit with sensor and method of manufacturing such an integrated circuit
EP3216046B1 (en) Reliability improvement of polymer-based capacitors by moisture barrier
CN104733288B (zh) 用于加工半导体器件的方法
US20110079862A1 (en) Self-aligned insulating etchstop layer on a metal contact
CN107748230B (zh) 具有框架通路的气体传感器设备和相关方法
EP3001186B1 (en) Sensor chip
CN110709350B (zh) 利用ALGe的共晶键合
CN106796997B (zh) 有机光电部件的封装体
CN106098639B (zh) 晶片封装体及其制造方法
KR20090098658A (ko) 반도체 장치 및 그 제조 방법
JP6870003B2 (ja) 集積回路のためのパッケージングにおける又は関連する改善
US7602038B2 (en) Damascene structure having a reduced permittivity and manufacturing method thereof
JP2019516992A5 (enExample)
CN110621613B (zh) 半导体芯片
KR102263508B1 (ko) 선택적 증착법을 이용한 적층가능한 기판의 결합방법
US11476293B2 (en) Manufacturing method of chip package
CN101877338B (zh) 半导体封装及其制造方法
JP2018152505A (ja) 半導体装置および半導体装置の製造方法
CN108622849A (zh) 半导体装置及其制造方法
US8865563B2 (en) Film embedding method and semiconductor device
JP2016029711A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20191220

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20201119

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20201127

A524 Written submission of copy of amendment under article 19 pct

Free format text: JAPANESE INTERMEDIATE CODE: A524

Effective date: 20210224

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20210323

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20210414

R150 Certificate of patent or registration of utility model

Ref document number: 6870003

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250