CA3022281A1 - Improvements in or relating to packaging for integrated circuits - Google Patents

Improvements in or relating to packaging for integrated circuits Download PDF

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Publication number
CA3022281A1
CA3022281A1 CA3022281A CA3022281A CA3022281A1 CA 3022281 A1 CA3022281 A1 CA 3022281A1 CA 3022281 A CA3022281 A CA 3022281A CA 3022281 A CA3022281 A CA 3022281A CA 3022281 A1 CA3022281 A1 CA 3022281A1
Authority
CA
Canada
Prior art keywords
layer
film
assay device
sensing
passivation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA3022281A
Other languages
English (en)
French (fr)
Inventor
Zahid Ansari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DNAE Group Holdings Ltd
Original Assignee
DNAE Group Holdings Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DNAE Group Holdings Ltd filed Critical DNAE Group Holdings Ltd
Publication of CA3022281A1 publication Critical patent/CA3022281A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • G01N27/4148Integrated circuits therefor, e.g. fabricated by CMOS processing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10W74/114
    • H10W74/121
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H10W72/536
    • H10W72/5363
    • H10W72/59
    • H10W74/10
    • H10W90/754

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Molecular Biology (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Apparatus Associated With Microorganisms And Enzymes (AREA)
  • Micromachines (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Semiconductor Memories (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Investigating Or Analyzing Materials By The Use Of Fluid Adsorption Or Reactions (AREA)
CA3022281A 2016-05-18 2017-05-15 Improvements in or relating to packaging for integrated circuits Abandoned CA3022281A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GBGB1608758.7A GB201608758D0 (en) 2016-05-18 2016-05-18 Improvements in or relating to packaging for integrated circuits
GB1608758.7 2016-05-18
PCT/GB2017/051352 WO2017199009A1 (en) 2016-05-18 2017-05-15 Improvements in or relating to packaging for integrated circuits

Publications (1)

Publication Number Publication Date
CA3022281A1 true CA3022281A1 (en) 2017-11-23

Family

ID=56320613

Family Applications (1)

Application Number Title Priority Date Filing Date
CA3022281A Abandoned CA3022281A1 (en) 2016-05-18 2017-05-15 Improvements in or relating to packaging for integrated circuits

Country Status (7)

Country Link
US (1) US10634642B2 (enExample)
EP (1) EP3458851A1 (enExample)
JP (1) JP6870003B2 (enExample)
CN (1) CN109416340B (enExample)
CA (1) CA3022281A1 (enExample)
GB (1) GB201608758D0 (enExample)
WO (1) WO2017199009A1 (enExample)

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676042A (en) * 1979-11-28 1981-06-23 Shindengen Electric Mfg Co Ltd Field effect transistor for ion sensor
GB2096825A (en) 1981-04-09 1982-10-20 Sibbald Alastair Chemical sensitive semiconductor field effect transducer
JPS6056247A (ja) * 1983-09-07 1985-04-01 Mitsubishi Electric Corp 半導体イオンセンサの絶縁法
JPS6073352A (ja) * 1983-09-30 1985-04-25 Hitachi Ltd 化学fetセンサ
JP2988020B2 (ja) * 1991-07-03 1999-12-06 日本電気株式会社 半導体イオンセンサ
JP4450031B2 (ja) * 2007-08-22 2010-04-14 株式会社デンソー 半導体部品
US7759135B2 (en) * 2008-09-30 2010-07-20 Infineon Technologies Ag Method of forming a sensor node module
DE102009002060B4 (de) * 2009-03-31 2023-08-03 Endress+Hauser Conducta Gmbh+Co. Kg Ionensensitiver Sensor mit Mehrfachschichtaufbau im sensitiven Bereich sowie Verfahren zur Herstellung eines solchen Sensors
FR2991053B1 (fr) * 2012-05-25 2014-06-06 Hemodia Capteur isfet avec dispositif de controle integre.
EP2677307B1 (en) * 2012-06-21 2016-05-11 Nxp B.V. Integrated circuit with sensors and manufacturing method
GB2508582A (en) * 2012-10-12 2014-06-11 Dna Electronics Ltd ISFET with Titanium Nitride layer
US9395326B2 (en) * 2013-11-01 2016-07-19 Taiwan Semiconductor Manufacturing Company Limited FET sensing cell and method of improving sensitivity of the same
TWI600901B (zh) * 2015-09-14 2017-10-01 友達光電股份有限公司 離子感測場效電晶體
US9470652B1 (en) * 2015-09-15 2016-10-18 Freescale Semiconductor, Inc. Sensing field effect transistor devices and method of their manufacture

Also Published As

Publication number Publication date
GB201608758D0 (en) 2016-06-29
US10634642B2 (en) 2020-04-28
CN109416340B (zh) 2021-08-27
EP3458851A1 (en) 2019-03-27
US20190302051A1 (en) 2019-10-03
JP6870003B2 (ja) 2021-05-12
WO2017199009A1 (en) 2017-11-23
JP2019516992A (ja) 2019-06-20
CN109416340A (zh) 2019-03-01

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Legal Events

Date Code Title Description
EEER Examination request

Effective date: 20220114

EEER Examination request

Effective date: 20220114

EEER Examination request

Effective date: 20220114

EEER Examination request

Effective date: 20220114

FZDE Discontinued

Effective date: 20240325