JP6858576B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP6858576B2
JP6858576B2 JP2017014613A JP2017014613A JP6858576B2 JP 6858576 B2 JP6858576 B2 JP 6858576B2 JP 2017014613 A JP2017014613 A JP 2017014613A JP 2017014613 A JP2017014613 A JP 2017014613A JP 6858576 B2 JP6858576 B2 JP 6858576B2
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Prior art keywords
adhesive layer
layer
conductive paste
semiconductor chip
wiring
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JP2017014613A
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Japanese (ja)
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JP2018125349A (ja
JP2018125349A5 (enExample
Inventor
直 荒井
直 荒井
良和 平林
良和 平林
秀敏 荒井
秀敏 荒井
小平　正司
正司 小平
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2017014613A priority Critical patent/JP6858576B2/ja
Priority to US15/852,479 priority patent/US10121695B2/en
Publication of JP2018125349A publication Critical patent/JP2018125349A/ja
Publication of JP2018125349A5 publication Critical patent/JP2018125349A5/ja
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    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
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CN111554639A (zh) * 2020-04-02 2020-08-18 珠海越亚半导体股份有限公司 嵌入式芯片封装及其制造方法
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CN114975610A (zh) * 2021-02-25 2022-08-30 广东美的白色家电技术创新中心有限公司 半导体器件组件及集成电路、电器设备
EP4099807A1 (en) * 2021-06-01 2022-12-07 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier interconnection and manufacturing method
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JP2005039240A (ja) * 2003-06-24 2005-02-10 Ngk Spark Plug Co Ltd 中継基板、半導体素子付き中継基板、中継基板付き基板、半導体素子と中継基板と基板とからなる構造体
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US8963340B2 (en) * 2011-09-13 2015-02-24 International Business Machines Corporation No flow underfill or wafer level underfill and solder columns
JP6279717B2 (ja) * 2014-04-14 2018-02-14 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6467797B2 (ja) 2014-07-14 2019-02-13 凸版印刷株式会社 配線基板、配線基板を用いた半導体装置およびこれらの製造方法
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