JP6802620B2 - 半導体発光装置の製造方法及び半導体発光装置 - Google Patents
半導体発光装置の製造方法及び半導体発光装置 Download PDFInfo
- Publication number
- JP6802620B2 JP6802620B2 JP2015100707A JP2015100707A JP6802620B2 JP 6802620 B2 JP6802620 B2 JP 6802620B2 JP 2015100707 A JP2015100707 A JP 2015100707A JP 2015100707 A JP2015100707 A JP 2015100707A JP 6802620 B2 JP6802620 B2 JP 6802620B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- semiconductor light
- emitting device
- metal
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 148
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000002184 metal Substances 0.000 claims description 121
- 229910052751 metal Inorganic materials 0.000 claims description 121
- 239000011347 resin Substances 0.000 claims description 86
- 229920005989 resin Polymers 0.000 claims description 86
- 238000000576 coating method Methods 0.000 claims description 69
- 239000011248 coating agent Substances 0.000 claims description 65
- 239000011247 coating layer Substances 0.000 claims description 64
- 239000000758 substrate Substances 0.000 claims description 45
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 24
- 238000010438 heat treatment Methods 0.000 claims description 13
- 238000004070 electrodeposition Methods 0.000 claims description 12
- 230000005496 eutectics Effects 0.000 claims description 12
- 239000004962 Polyamide-imide Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 11
- 229920002312 polyamide-imide Polymers 0.000 claims description 11
- 238000005304 joining Methods 0.000 claims description 10
- 229910015363 Au—Sn Inorganic materials 0.000 claims description 8
- 239000004952 Polyamide Substances 0.000 claims description 7
- 239000004642 Polyimide Substances 0.000 claims description 7
- 229920002647 polyamide Polymers 0.000 claims description 7
- 229920001721 polyimide Polymers 0.000 claims description 7
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 1
- 230000001681 protective effect Effects 0.000 description 21
- 238000012360 testing method Methods 0.000 description 20
- 239000010410 layer Substances 0.000 description 19
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 16
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 13
- 238000002156 mixing Methods 0.000 description 9
- 238000007747 plating Methods 0.000 description 9
- 230000035939 shock Effects 0.000 description 8
- 238000001723 curing Methods 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 238000013007 heat curing Methods 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000000654 additive Substances 0.000 description 4
- 230000000996 additive effect Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- 230000001186 cumulative effect Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000007718 adhesive strength test Methods 0.000 description 2
- 239000011324 bead Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 230000001376 precipitating effect Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 238000010998 test method Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000007591 painting process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/085—Material
- H01L2224/08501—Material at the bonding interface
- H01L2224/08502—Material at the bonding interface comprising an eutectic alloy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83805—Soldering or alloying involving forming a eutectic alloy at the bonding interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
Description
VESD=((Cs/(Cs+Ct))×V ・・・式1
となる。
2… 半導体発光素子
3… 保護素子
4… ボンディングワイヤ
5… 透光性樹脂
6… 遮光性樹脂
10… 基台プレート
11… 第1台座部
11a… 素子接合面
11b… 第1ダイボンディングパッド
12… 第2台座部
12a… 素子接合面
12b… 第2ダイボンディングパッド
14… 塗装膜
15… 樹脂被覆層
16… 本体部
17… 電極端子
18… 支持端部
30… 積層プレート
31… 第1キャビティ
31a… ボンディングワイヤ接合面
31b… 第1ワイヤボンディングパッド
32… 第2キャビティ
32a… ボンディングワイヤ接合面
32b… 第2ワイヤボンディングパッド
34… 塗装膜
35… 樹脂被覆層
36… 本体部
37… 電極端子
50… 金属積層基板
51… 積層本体部
52… 貫通孔
53… 樹脂被覆層
55… 第1金属板
56… 第2金属板
57… 樹脂被覆層
60… 多連化半導体発光装置
61… 基台プレート
62… 塗装膜
63… 樹脂被覆層
64… 第1積層プレート
65… 塗装膜
66… 樹脂被覆層
67… 第2積層プレート
68… 塗装膜
69… 樹脂被覆層
70… 金属積層基板
71… 基台プレート
72… 塗装膜
73… 樹脂被覆層
74… 積層プレート
75… 塗装膜
76… 樹脂被覆層
77… 空間保持部材
78… 金属積層基板
Claims (7)
- 2枚の金属プレートの夫々に、耐熱性及び絶縁性を有する電着塗料を用いた電着塗装によって塗装膜を析出させる工程と、
前記2枚の金属プレートのうち一方の金属プレートの塗装膜に加熱処理を施して完全硬化させると共に他方の金属プレートの塗装膜に加熱処理を施して半硬化させる工程と、
前記完全硬化の塗装膜を有する前記一方の金属プレートと前記半硬化の塗装膜を有する前記他方の金属プレートを、前記一方の金属プレートの上方側に前記他方の金属プレートが位置するよう重ね合わせて加圧加熱処理を施して前記半硬化の塗装膜を完全硬化させることにより、前記2枚の金属プレートが完全硬化した塗装膜で接着されてなる2層構造の金属積層基板を形成する工程と、
前記金属積層基板の一方の金属プレートの上面に形成される前記塗装膜が被膜されていない部分に半導体発光素子を接合し、他方の金属プレートの上面に形成される前記塗装膜が被膜されていない部分に、一端部を前記半導体発光素子の素子電極に接合したボンディングワイヤの他端部を接合する工程と、
を備えたことを特徴とする半導体発光装置の製造方法。 - 前記電着塗料は、ポリアミドイミド、ポリイミド及びポリアミドのうちのいずれかからなることを特徴とする請求項1に記載の半導体発光装置の製造方法。
- 前記半導体発光素子は、共晶接合によって接合されることを特徴とする請求項1又は請求項2に記載の半導体発光装置の製造方法。
- 前記半導体発光素子は、前記一方の金属プレートから突出しその上面が、接合される前記半導体発光素子の接合面とほぼ同一形状寸法を有する台座部上に接合されることを特徴とする請求項3に記載の半導体発光装置の製造方法。
- 前記金属プレートの夫々は、受電用の電極端子部を有することを特徴とする請求項1〜請求項4のいずれかに記載の半導体発光装置の製造方法。
- 前記金属プレートの夫々は、該金属プレートの夫々を貫通して実装時に位置決め及び嵌挿固定を行う貫通孔を有することを特徴とする請求項1〜請求項5のいずれかに記載の半導体発光装置の製造方法。
- 金属プレートからなる基台プレートおよび積層プレートが、各々を被覆する樹脂被覆層同士の接着により積層されてなる金属積層本体部と、前記基台プレートおよび前記積層プレートの夫々から互いに平行に延設された受電用の電極端子と、を備えた金属積層基板と、
前記基台プレートの上面に形成される前記樹脂被覆層が被覆されていない部分に接合された半導体発光素子と、
前記積層プレートの上面に形成される前記樹脂被覆層が被覆されていない部分に、前記半導体発光素子の素子電極に接合された一端部から延びる他端部が接合されたボンディングワイヤと、
を備え、
前記基台プレートおよび前記積層プレートを被覆する前記樹脂被覆層は、ポリアミドイミド、ポリイミド及びポリアミドのうちのいずれかからなり、
前記金属積層本体部は、前記基台プレートおよび前記積層プレートを連続して貫通する貫通孔を有し、
前記基台プレートの上面に、前記半導体発光素子を接合するための台座部が形成され、
前記台座部は、当該基台プレートの上面から所定の高さに突出し、
当該台座部の上面は、前記樹脂被覆層が被覆されていない部分に対応すると共に、接合される半導体発光素子の接合面とほぼ同一形状寸法の素子接合面であり、
前記半導体発光素子は、Au−Sn共晶接合によって前記台座部の上面に接合され、
前記積層プレートは、その厚み方向に貫通する他の貫通孔を有し、前記他の貫通孔により前記台座部を収容するキャビティが構成され、
前記キャビティの内側面は、前記樹脂被覆層が被覆されていない部分を含み、
前記キャビティ内に、前記半導体発光素子及び前記ボンディングワイヤを覆う透光性樹脂が充填されており、
前記金属積層基板上に、前記基台プレートを被覆する前記樹脂被覆層と同一材料であり、当該樹脂被覆層と接着する樹脂被覆層により被覆される他の金属プレートが積層される
ことを特徴とする半導体発光装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015100707A JP6802620B2 (ja) | 2015-05-18 | 2015-05-18 | 半導体発光装置の製造方法及び半導体発光装置 |
US15/157,133 US9905521B2 (en) | 2015-05-18 | 2016-05-17 | Method for manufacturing semiconductor light-emitting device and semiconductor light-emitting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015100707A JP6802620B2 (ja) | 2015-05-18 | 2015-05-18 | 半導体発光装置の製造方法及び半導体発光装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020098289A Division JP7088985B2 (ja) | 2020-06-05 | 2020-06-05 | 半導体発光装置の製造方法、積層基板の製造方法、及び半導体発光装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016219522A JP2016219522A (ja) | 2016-12-22 |
JP6802620B2 true JP6802620B2 (ja) | 2020-12-16 |
Family
ID=57325724
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015100707A Active JP6802620B2 (ja) | 2015-05-18 | 2015-05-18 | 半導体発光装置の製造方法及び半導体発光装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9905521B2 (ja) |
JP (1) | JP6802620B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6597476B2 (ja) * | 2016-05-20 | 2019-10-30 | 日亜化学工業株式会社 | 配線基体の製造方法並びに配線基体及びそれを用いた発光装置。 |
US10868209B2 (en) * | 2017-02-23 | 2020-12-15 | Osram Oled Gmbh | Sensor element |
JP7088985B2 (ja) * | 2020-06-05 | 2022-06-21 | スタンレー電気株式会社 | 半導体発光装置の製造方法、積層基板の製造方法、及び半導体発光装置 |
JP7450466B2 (ja) | 2020-06-22 | 2024-03-15 | スタンレー電気株式会社 | 発光装置及び発光装置の製造方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04221865A (ja) * | 1990-12-20 | 1992-08-12 | Fujikura Ltd | 微小素子の固定方法 |
JP4190632B2 (ja) * | 1998-11-25 | 2008-12-03 | 古河電気工業株式会社 | プリント配線基板 |
US6653572B2 (en) * | 2001-02-07 | 2003-11-25 | The Furukawa Electric Co., Ltd. | Multilayer circuit board |
JP2003031719A (ja) * | 2001-07-16 | 2003-01-31 | Shinko Electric Ind Co Ltd | 半導体パッケージ及びその製造方法並びに半導体装置 |
JP4045781B2 (ja) * | 2001-08-28 | 2008-02-13 | 松下電工株式会社 | 発光装置 |
JP2006269079A (ja) | 2005-03-22 | 2006-10-05 | Hitachi Lighting Ltd | 光源モジュール、液晶表示装置および光源モジュールの製造方法 |
JP2008060548A (ja) * | 2006-08-02 | 2008-03-13 | Sanyo Electric Co Ltd | 素子搭載用基板、素子搭載用基板の製造方法、および半導体モジュール |
US20090001404A1 (en) * | 2007-06-29 | 2009-01-01 | Ohata Takafumi | Semiconductor light emitting device, process for producing the same, and led illuminating apparatus using the same |
KR100939304B1 (ko) * | 2009-06-18 | 2010-01-28 | 유트로닉스주식회사 | Led어레이모듈 및 그 제조방법 |
JP5515587B2 (ja) * | 2009-10-05 | 2014-06-11 | 大日本印刷株式会社 | Led素子載置部材およびその製造方法、ならびにled素子パッケージおよびその製造方法 |
TW201128812A (en) * | 2009-12-01 | 2011-08-16 | Lg Innotek Co Ltd | Light emitting device |
JP2012043571A (ja) * | 2010-08-17 | 2012-03-01 | Citizen Holdings Co Ltd | 照明ユニット |
CN103154607A (zh) * | 2010-09-13 | 2013-06-12 | Bk科技株式会社 | 提高了散热特性的高光度led光源构造体 |
JP2012165016A (ja) | 2012-04-27 | 2012-08-30 | Sanyo Electric Co Ltd | 発光装置 |
JP6155608B2 (ja) * | 2012-11-21 | 2017-07-05 | 市光工業株式会社 | 車両用灯具 |
CN103840061B (zh) * | 2012-11-27 | 2016-08-03 | 展晶科技(深圳)有限公司 | 发光二极管 |
TWI482318B (zh) * | 2012-12-18 | 2015-04-21 | Advanced Optoelectronic Tech | 發光二極體及其封裝結構 |
-
2015
- 2015-05-18 JP JP2015100707A patent/JP6802620B2/ja active Active
-
2016
- 2016-05-17 US US15/157,133 patent/US9905521B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2016219522A (ja) | 2016-12-22 |
US9905521B2 (en) | 2018-02-27 |
US20160343927A1 (en) | 2016-11-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8987774B2 (en) | Semiconductor light-emitting device and producing method thereof | |
US9512968B2 (en) | LED module | |
JP4122784B2 (ja) | 発光装置 | |
JP5673190B2 (ja) | 発光装置 | |
JP5813467B2 (ja) | 基板、発光装置及び基板の製造方法 | |
KR101593740B1 (ko) | 발광 장치 및 발광 장치의 제조 방법 | |
JP5238366B2 (ja) | 半導体発光装置 | |
US7866853B2 (en) | Light-emitting element mounting substrate and manufacturing method thereof, light-emitting element module and manufacturing method thereof, display device, lighting device, and traffic light | |
JP2007514320A (ja) | 表面実装の発光チップパッケージ | |
JP6802620B2 (ja) | 半導体発光装置の製造方法及び半導体発光装置 | |
US8802460B2 (en) | Method of mounting LED chip | |
US20130307014A1 (en) | Semiconductor light emitting device | |
WO2010050067A1 (ja) | 発光素子パッケージ用基板及び発光素子パッケージ | |
EP2597678A2 (en) | Package for mounting electronic components, electronic apparatus, and method for manufacturing the package | |
JP2011233552A (ja) | 半導体発光装置及びその製造方法 | |
JP4976982B2 (ja) | Ledユニット | |
JP2012124498A (ja) | Ledモジュール装置及びその製造方法 | |
KR20090028709A (ko) | 발광소자 실장용 기판과 그 제조방법, 발광소자 모듈과 그 제조방법, 표시장치, 조명장치 및 교통 신호기 | |
US20100006888A1 (en) | Method of manufacturing optical semiconductor device, optical semiconductor device, and method of manufacturing optical semiconductor apparatus | |
WO2018168473A1 (ja) | 光学モジュールの製造方法及び光学モジュール | |
KR102208504B1 (ko) | 반사성 측면 코팅을 갖는 발광 디바이스 패키지 | |
JP4912624B2 (ja) | 発光素子実装用基板の製造方法及び発光素子モジュールの製造方法 | |
JP7088985B2 (ja) | 半導体発光装置の製造方法、積層基板の製造方法、及び半導体発光装置 | |
JP6651699B2 (ja) | 側面発光型発光装置の製造方法 | |
JP2014049642A (ja) | 発光装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20180420 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190228 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190305 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190423 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190903 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191101 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200407 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200601 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20201110 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20201127 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6802620 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |