JP6780710B2 - 回路モジュール - Google Patents
回路モジュール Download PDFInfo
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- JP6780710B2 JP6780710B2 JP2018558916A JP2018558916A JP6780710B2 JP 6780710 B2 JP6780710 B2 JP 6780710B2 JP 2018558916 A JP2018558916 A JP 2018558916A JP 2018558916 A JP2018558916 A JP 2018558916A JP 6780710 B2 JP6780710 B2 JP 6780710B2
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- 229920005989 resin Polymers 0.000 claims description 159
- 239000011347 resin Substances 0.000 claims description 159
- 238000007789 sealing Methods 0.000 claims description 69
- 239000000758 substrate Substances 0.000 claims description 25
- 239000004020 conductor Substances 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 12
- 239000010408 film Substances 0.000 description 21
- 238000004519 manufacturing process Methods 0.000 description 20
- 239000003822 epoxy resin Substances 0.000 description 12
- 229920000647 polyepoxide Polymers 0.000 description 12
- 230000007547 defect Effects 0.000 description 5
- 229920002050 silicone resin Polymers 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000004382 potting Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
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- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
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- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H01L2924/181—Encapsulation
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- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
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- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
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- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
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Description
図1〜図4を参照して、本発明に基づく実施の形態1における回路モジュールについて説明する。本実施の形態における回路モジュール101の平面図を図1に示す。回路モジュール101の側面図を図2に示す。回路モジュール101は、基板1と封止樹脂部3と導体膜7とを有する。導体膜7は、たとえばシールドとして形成された膜である。導体膜7は、たとえば金属膜である。
図11〜図14を参照して、本発明に基づく実施の形態2における回路モジュールについて説明する。本実施の形態における回路モジュール102の平面図を図11に示す。回路モジュール102の側面図を図12に示す。回路モジュール102の透視平面図を図13に示す。図13におけるXIV−XIV線に関する矢視断面図を図14に示す。回路モジュール102の基本的な構成は、実施の形態1で説明した回路モジュール101と同様である。回路モジュール102は、実施の形態1で説明した回路モジュール101に比べて、主に以下の点で異なる。
図21〜図24を参照して、本発明に基づく実施の形態3における回路モジュールについて説明する。本実施の形態における回路モジュール103の平面図を図21に示す。回路モジュール103の側面図を図22に示す。回路モジュール103の透視平面図を図23に示す。図23におけるXXIV−XXIV線に関する矢視断面図を図24に示す。回路モジュール103の基本的な構成は、実施の形態2で説明した回路モジュール102と同様である。回路モジュール103は、実施の形態2で説明した回路モジュール102に比べて、主に以下の点で異なる。
図5、図15、図25〜図29、図24を参照して、本発明に基づく実施の形態3における回路モジュールの製造方法について説明する。
なお、今回開示した上記実施の形態はすべての点で例示であって制限的なものではない。本発明の範囲は請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更を含むものである。
Claims (6)
- 上面および側面を有し、主表面を有する基板と、
前記主表面に実装された第1部品と、
前記主表面を覆いつつ前記第1部品の少なくとも前記側面を覆う封止樹脂部とを備え、
前記第1部品は中空部を有しており、前記第1部品は、前記中空部に露出する接続部を備え、
前記封止樹脂部は前記第1部品の前記上面のうち前記中空部に対応する領域の少なくとも一部を避けて配置されており、
前記第1部品の上面は、前記封止樹脂部の上面より低い位置にあり、
前記第1部品は、前記中空部より上側に樹脂からなる第1樹脂部を含み、
前記第1樹脂部の上面と前記封止樹脂部の上面とは、同一平面内にある、回路モジュール。 - 上面および側面を有し、主表面を有する基板と、
前記主表面に実装された第1部品と、
前記主表面を覆いつつ前記第1部品の少なくとも前記側面を覆う封止樹脂部とを備え、
前記第1部品は中空部を有しており、前記第1部品は、前記中空部に露出する接続部を備え、
前記封止樹脂部は前記第1部品の前記上面のうち前記中空部に対応する領域の少なくとも一部を避けて配置されており、
前記第1部品の上面は、前記封止樹脂部の上面より低い位置にあり、
前記第1部品の上側に、前記封止樹脂部の材料よりヤング率が低い樹脂からなる第2樹脂部が配置されており、前記第2樹脂部の上面と前記封止樹脂部の上面とは、同一平面内にある、回路モジュール。 - 少なくとも前記第1部品の上面と前記封止樹脂部の上面との間の境界を覆うように導体膜が配置されている、請求項1に記載の回路モジュール。
- 少なくとも前記第2樹脂部の上面と前記封止樹脂部の上面との間の境界を覆うように導体膜が配置されている、請求項2に記載の回路モジュール。
- 主表面を有する基板と、
中空部を有し、前記主表面に配置される第1部品と、
前記主表面に配置され、前記第1部品よりも背の高い第2部品と、
第1樹脂部とを備え、
前記第1樹脂部は、前記第2部品の上面を覆い、かつ、前記第1部品の上面のうち前記中空部に対応する領域の少なくとも一部を避けて配置されており、
前記第1部品の上側に、前記第1樹脂部の材料よりヤング率が低い樹脂からなる第2樹脂部が配置されている、回路モジュール。 - 少なくとも前記第2樹脂部の上面と前記第1樹脂部の上面との間の境界を覆うように導体膜が配置されている、請求項5に記載の回路モジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016254777 | 2016-12-28 | ||
JP2016254777 | 2016-12-28 | ||
PCT/JP2017/042218 WO2018123382A1 (ja) | 2016-12-28 | 2017-11-24 | 回路モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2018123382A1 JPWO2018123382A1 (ja) | 2019-10-31 |
JP6780710B2 true JP6780710B2 (ja) | 2020-11-04 |
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ID=62707507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018558916A Active JP6780710B2 (ja) | 2016-12-28 | 2017-11-24 | 回路モジュール |
Country Status (4)
Country | Link |
---|---|
US (1) | US10818566B2 (ja) |
JP (1) | JP6780710B2 (ja) |
CN (1) | CN110114870B (ja) |
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JP2003115563A (ja) * | 2001-10-04 | 2003-04-18 | Toshiba Corp | 電気部品とその製造方法 |
JP2005110017A (ja) | 2003-09-30 | 2005-04-21 | Toshiba Corp | 高周波フィルタモジュール及びその製造方法 |
DE102006033319B4 (de) * | 2006-07-17 | 2010-09-30 | Infineon Technologies Ag | Verfahren zur Herstellung eines Halbleiterbauelements in Halbleiterchipgröße mit einem Halbleiterchip |
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JP5003260B2 (ja) * | 2007-04-13 | 2012-08-15 | 日本電気株式会社 | 半導体装置およびその製造方法 |
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JP2010165748A (ja) * | 2009-01-13 | 2010-07-29 | Renesas Electronics Corp | 電子装置 |
JP2011146486A (ja) * | 2010-01-13 | 2011-07-28 | Panasonic Corp | 光学デバイスおよびその製造方法ならびに電子機器 |
US8492203B2 (en) * | 2011-01-21 | 2013-07-23 | Stats Chippac, Ltd. | Semiconductor device and method for forming semiconductor package having build-up interconnect structure over semiconductor die with different CTE insulating layers |
JP2013062328A (ja) * | 2011-09-12 | 2013-04-04 | Toshiba Corp | 半導体装置 |
JP5864180B2 (ja) * | 2011-09-21 | 2016-02-17 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法 |
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WO2014080931A1 (ja) * | 2012-11-21 | 2014-05-30 | 株式会社カネカ | 放熱構造体 |
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CN103400825B (zh) * | 2013-07-31 | 2016-05-18 | 日月光半导体制造股份有限公司 | 半导体封装件及其制造方法 |
US9263425B2 (en) * | 2013-12-11 | 2016-02-16 | Infineon Technologies Austria Ag | Semiconductor device including multiple semiconductor chips and a laminate |
JP6190732B2 (ja) * | 2014-01-30 | 2017-08-30 | 新光電気工業株式会社 | 放熱板及び半導体装置 |
US20150221578A1 (en) * | 2014-02-05 | 2015-08-06 | Infineon Technologies Ag | Semiconductor package and method for producing a semiconductor |
JP2015154032A (ja) * | 2014-02-19 | 2015-08-24 | 株式会社東芝 | 配線基板とそれを用いた半導体装置 |
FR3018630A1 (fr) * | 2014-03-11 | 2015-09-18 | St Microelectronics Grenoble 2 | Boitier electronique perfore et procede de fabrication |
TWI549235B (zh) * | 2014-07-03 | 2016-09-11 | 矽品精密工業股份有限公司 | 封裝結構及其製法與定位構形 |
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