JP6496320B2 - サブ20nmの図案の均一なインプリントパターン転写方法 - Google Patents
サブ20nmの図案の均一なインプリントパターン転写方法 Download PDFInfo
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- 238000013461 design Methods 0.000 title claims description 28
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- 238000005530 etching Methods 0.000 claims description 35
- 230000008569 process Effects 0.000 claims description 35
- 238000000151 deposition Methods 0.000 claims description 19
- 238000000059 patterning Methods 0.000 claims description 16
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
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- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02623—Liquid deposition
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
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- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Shaping Of Tube Ends By Bending Or Straightening (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Description
本出願は、35U.S.C.§119(e)(1)に基づき、参照によりその全体が本明細書に援用される2013年12月30日出願の米国特許仮出願第61/921,647号(特許文献1)の利益を主張する。
Claims (16)
- 20nm未満のパターンを高い適合性を伴って基板へ転写するためのインプリントリソグラフィ法であって、以下の工程:
有機重合化材料のパターニング化層を前記基板上にインプリントする工程であって、前記パターニング化層は残留層、ならびにパターニング化層の図案を決定する1つ以上の凸部及び凹部を有し、前記凸部は、残留層から高さ20nm未満で伸長していることを条件とする工程;
前記パターニング化層の少なくとも前記凸部及び凹部にエッチング選択性材料を沈着させる工程であって、前記エッチング選択性材料は、有機重合化材料に対して50:1以上のエッチング選択性を有する金属、半金属又は非有機酸化物を含んでいることを条件とする工程;
前記沈着したエッチング選択性材料にエッチバック処理を行い、前記凸部を露出させる工程;
前記凸部にエッチバック処理を行い、前記基板を露出させる工程;ならびに
前記基板をエッチングし、前記基板のパターニング化層の反転パターンを形成する工程
を含むことを特徴とする方法。 - 20nm未満の高適合性パターン転写するためのインプリントリソグラフィ法であって、以下の工程:
有機重合化材料のパターニング化層を基板上にインプリントする工程であって、前記パターニング化層は残留層、ならびにパターニング化層の図案を決定する1つ以上の凸部及び凹部を有し、前記凸部は、残留層から高さ20nm未満で伸長していることを条件とする工程;
前記凹部の底部の前記残留層にエッチング処理をしてこれを除去する工程;
前記パターニング化層の少なくとも前記凸部及び凹部にエッチング選択性材料を沈着させる工程であって、前記エッチング選択性材料は、有機重合化材料に対して50:1以上のエッチング選択性を有する金属、半金属又は非有機酸化物を含んでいることを条件とする工程;
前記沈着したエッチング選択性材料にエッチバック処理を行い、前記凸部を露出させる工程;
前記凸部にエッチバック処理を行い、前記基板を露出させる工程;ならびに
前記基板をエッチングし、前記基板のパターニング化層の反転パターンを形成する工程
を含むことを特徴とする方法。 - 前記エッチング選択性材料はSiO 2 、Cr、Al 2 O 3 又はSiから成る群より選択されることを特徴とする請求項1又は2に記載の方法。
- 前記エッチング選択性材料の沈着工程は隙間充填沈着プロセスを更に含むことを特徴とする請求項1ないし3のいずれか1項に記載の方法。
- 前記エッチング選択性材料の沈着工程は前記パターニング化層上に前記エッチング選択性材料のコンフォーマル層を形成する工程を更に含むことを特徴とする請求項1ないし3のいずれか1項に記載の方法。
- 前記凹部は前記エッチング選択性材料で完全に充填する工程を更に含むことを特長とする請求項5に記載の方法。
- 前記エッチング選択性材料を沈着させる工程はスピンオンプロセスを更に含むことを特徴とする請求項6に記載の方法。
- 前記コンフォーマル層上に重合化材料の平坦層を形成した後、前記平坦層をエッチバック処理し、前記コンフォーマル層の一部を露出させる工程を更に含むことを特徴とする請求項5に記載の方法。
- 前記凹部により複数の穴隙が決定することを特徴とする請求項1〜8のいずれか1項に記載の方法。
- 前記凸部により前記基板にインプリントされる複数の平行線が決定されることを特徴とする請求項1〜8のいずれか1項に記載の方法。
- 20nm未満のパターンを高い適合性を伴って基板へ転写するためのインプリントリソグラフィ法であって、以下の工程:
有機重合化材料のパターニング化層を前記基板上にインプリントする工程であって、前記パターニング化層は残留層ならびにパターニング化層の図案を決定する1つ以上の凸部及び凹部を有し、前記凸部は、残留層から高さ20nm未満で伸長していることを条件とする工程;
前記パターニング化層の前記凸部のみにエッチング選択性材料を沈着させる工程であって、前記エッチング選択性材料は、有機重合化材料に対して50:1以上のエッチング選択性を有する金属、半金属又は非有機酸化物を含んでいることを条件とする工程;
前記残留層にエッチバック処理を行い、前記基板を露出させる工程;及び、
前記基板をエッチングし、前記基板のパターニング化層と一致するパターンを形成する工程を含むことを特徴とする方法。 - 前記エッチング選択性材料はSiO 2 、Cr、Al 2 O 3 又はSiから成る群より選択されることを特徴とする請求項11に記載の方法。
- 前記エッチング選択性材料の沈着工程は小角度蒸着プロセスを更に含むことを特徴とする請求項11又は12に記載の方法。
- 前記凸部により複数の柱部が決定することを特徴とする請求項11〜13のいずれか1項に記載の方法。
- 前記凸部により前記基板にインプリントされる複数の平行線が決定されることを特徴とする請求項11〜13のいずれか1項に記載の方法。
- 前記図案を決定する1つ以上の前記凸部は、縦横比が1.5から3.0であることを特徴とする請求項1〜15のいずれかに記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201361921647P | 2013-12-30 | 2013-12-30 | |
US61/921,647 | 2013-12-30 | ||
PCT/US2014/072706 WO2015103232A1 (en) | 2013-12-30 | 2014-12-30 | Methods for uniform imprint pattern transfer of sub-20 nm features |
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JP2017504201A JP2017504201A (ja) | 2017-02-02 |
JP6496320B2 true JP6496320B2 (ja) | 2019-04-03 |
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JP2016542899A Active JP6496320B2 (ja) | 2013-12-30 | 2014-12-30 | サブ20nmの図案の均一なインプリントパターン転写方法 |
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US (1) | US9514950B2 (ja) |
JP (1) | JP6496320B2 (ja) |
KR (1) | KR102243630B1 (ja) |
CN (1) | CN106030406B (ja) |
SG (1) | SG11201604539QA (ja) |
TW (1) | TWI662359B (ja) |
WO (1) | WO2015103232A1 (ja) |
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US10211051B2 (en) * | 2015-11-13 | 2019-02-19 | Canon Kabushiki Kaisha | Method of reverse tone patterning |
US10515847B2 (en) * | 2017-09-29 | 2019-12-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming vias and method for forming contacts in vias |
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US9514950B2 (en) | 2016-12-06 |
CN106030406B (zh) | 2020-04-24 |
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