JP6400509B2 - 電子部品の製造方法 - Google Patents
電子部品の製造方法 Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
2 配線基板
3 電子素子
4 封止樹脂
5 板状部材(機能部材)
6 導電性部材、折り曲げ部付導電性部材
7 ボンディングパッド
8 グラウンド配線パターン
9 主面
10 接続電極
11 金属細線
12 クリーム半田
13 実装済基板
14 成形型
15 上型(第1の型)
16 下型(第2の型)
17 キャビティ
18 突起(第2の位置合わせ部)
19 切り欠き(第1の位置合わせ部)
20 クリーム半田
21 液状樹脂(流動性樹脂)
22 封止済基板
23 導電性部材
24 実装済基板
25 主面
26 封止済基板
27 導電性部材
28 実装済基板
29 主面
30 導電性部材
31 実装済基板
32 回転刃
33 ダイシングライン
Claims (4)
- 実装済電子基板を樹脂により封止する電子部品の製造方法において、
電子素子と、前記電子素子の接続電極に電気的に接続されたボンディングパッドと、グラウンド配線パターンと、前記グラウンド配線パターンに対して予め電気的に接続され導電性を有する機能部材とを主面において有する実装済基板を準備する工程と、
導電性を有する板状部材を準備する工程と、
前記板状部材の前記機能部材が接合する部分に、前記樹脂の硬化温度よりも低い融点を有するクリーム半田を載置する工程と、
第1の型の所定の位置に前記実装済基板を一時的に固定する工程と、
前記第1の型に相対向する第2の型に設けられたキャビティの内底面に前記板状部材を配置する工程と、
前記樹脂に由来する流動性樹脂によって前記キャビティを満たされた状態にする工程と、
前記第1の型と前記第2の型とを型締めすることによって、前記クリーム半田を介して前記板状部材と前記機能部材とを接触させる工程と、
前記第1の型と前記第2の型とを型締めした状態において、少なくとも前記機能部材と前記電子素子と前記グラウンド配線パターンと前記実装済基板の主面とを前記流動性樹脂に浸漬する工程と、
前記流動性樹脂を硬化させて硬化樹脂からなる封止樹脂を形成する工程と、
前記封止樹脂を冷却するとともに、前記封止樹脂を形成する工程において溶融した前記クリーム半田を硬化させる工程と、
前記第1の型と前記第2の型とを型開きすることによって、前記電子素子と前記グラウンド配線パターンと前記機能部材と前記板状部材と前記封止樹脂とを少なくとも有する電子部品を前記第2の型から分離する工程と
を備えることを特徴とする電子部品の製造方法。 - 実装済電子基板を樹脂により封止する電子部品の製造方法において、
主面に装着された電子素子と、前記電子素子の接続電極に電気的に接続されたボンディングパッドと、グラウンド配線パターンと、前記主面に対して予め熱的に接続され熱伝導性を有する機能部材とを有する実装済基板を準備する工程と、
熱伝導性を有する板状部材を準備する工程と、
前記板状部材の前記機能部材が接合する部分に、前記樹脂の硬化温度よりも低い融点を有するクリーム半田を載置する工程と、
第1の型の所定の位置に前記実装済基板を一時的に固定する工程と、
前記第1の型に相対向する第2の型に設けられたキャビティの内底面に前記板状部材を配置する工程と、
前記樹脂を溶融させた流動性樹脂によって前記キャビティを満たされた状態にする工程と、
前記第1の型と前記第2の型とを型締めすることによって、前記クリーム半田を介して前記板状部材と前記機能部材とを接触させる工程と、
前記第1の型と前記第2の型とを型締めした状態において、少なくとも前記機能部材と前記電子素子と前記グラウンド配線パターンと前記実装済基板の主面とを前記流動性樹脂に浸漬する工程と、
前記流動性樹脂を硬化させて硬化樹脂からなる封止樹脂を形成する工程と、
前記封止樹脂を冷却するとともに、前記封止樹脂を形成する工程において溶融した前記クリーム半田を硬化させる工程と、
前記第1の型と前記第2の型とを型開きすることによって、前記電子素子と前記グラウンド配線パターンと前記機能部材と前記板状部材と前記封止樹脂とを少なくとも有する電子部品を前記第2の型から分離する工程と
を備えることを特徴とする電子部品の製造方法。 - 前記機能部材は、板状であり、樹脂により封止された電子部品において、前記実装済基板と前記板状部材の間に壁を形成することを特徴とする請求項1又は2に記載の電子部品の製造方法。
- 前記機能部材が形成する壁によって、前記電子素子の少なくとも一部が、部分的に又は全体的に囲まれていることを特徴とする請求項3に記載の電子部品の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015038968A JP6400509B2 (ja) | 2015-02-27 | 2015-02-27 | 電子部品の製造方法 |
CN201580075550.2A CN107210271A (zh) | 2015-02-27 | 2015-10-23 | 电子部件及其制造方法和制造装置 |
PCT/JP2015/079941 WO2016136021A1 (ja) | 2015-02-27 | 2015-10-23 | 電子部品、その製造方法及び製造装置 |
KR1020177018910A KR20170121157A (ko) | 2015-02-27 | 2015-10-23 | 전자 부품, 그 제조 방법 및 제조 장치 |
TW104135739A TW201637149A (zh) | 2015-02-27 | 2015-10-30 | 電子組件、其製造方法以及製造裝置 |
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JP2015038968A JP6400509B2 (ja) | 2015-02-27 | 2015-02-27 | 電子部品の製造方法 |
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JP2016162840A JP2016162840A (ja) | 2016-09-05 |
JP6400509B2 true JP6400509B2 (ja) | 2018-10-03 |
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JP (1) | JP6400509B2 (ja) |
KR (1) | KR20170121157A (ja) |
CN (1) | CN107210271A (ja) |
TW (1) | TW201637149A (ja) |
WO (1) | WO2016136021A1 (ja) |
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JP6672113B2 (ja) * | 2016-09-09 | 2020-03-25 | Towa株式会社 | 電子回路装置及び電子回路装置の製造方法 |
WO2018061722A1 (ja) * | 2016-09-30 | 2018-04-05 | 株式会社村田製作所 | アンテナ内蔵モジュール及び通信装置 |
JP6654994B2 (ja) * | 2016-10-31 | 2020-02-26 | Towa株式会社 | 回路部品の製造方法 |
JP2018113399A (ja) * | 2017-01-13 | 2018-07-19 | Towa株式会社 | 回路部品の製造方法および回路部品 |
KR101958925B1 (ko) * | 2017-04-24 | 2019-03-19 | 이엘케이 주식회사 | 지문인식센서 모듈의 제조방법 및 이로부터 제조된 지문인식센서 모듈 |
JP6798472B2 (ja) * | 2017-11-15 | 2020-12-09 | オムロン株式会社 | 電子装置およびその製造方法 |
KR102471274B1 (ko) * | 2018-02-13 | 2022-11-28 | 삼성전자주식회사 | 리플로우를 위한 스택 툴 및 이를 포함하는 리플로우 장치 |
JP2020004840A (ja) * | 2018-06-28 | 2020-01-09 | アルパイン株式会社 | 電子ユニットおよびその製造方法 |
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JP2003249607A (ja) * | 2002-02-26 | 2003-09-05 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP4519398B2 (ja) * | 2002-11-26 | 2010-08-04 | Towa株式会社 | 樹脂封止方法及び半導体装置の製造方法 |
CN103797577B (zh) * | 2011-09-07 | 2017-06-09 | 株式会社村田制作所 | 模块制造方法及端子集合体 |
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2015
- 2015-02-27 JP JP2015038968A patent/JP6400509B2/ja active Active
- 2015-10-23 WO PCT/JP2015/079941 patent/WO2016136021A1/ja active Application Filing
- 2015-10-23 CN CN201580075550.2A patent/CN107210271A/zh active Pending
- 2015-10-23 KR KR1020177018910A patent/KR20170121157A/ko not_active Application Discontinuation
- 2015-10-30 TW TW104135739A patent/TW201637149A/zh unknown
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Publication number | Publication date |
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WO2016136021A1 (ja) | 2016-09-01 |
JP2016162840A (ja) | 2016-09-05 |
TW201637149A (zh) | 2016-10-16 |
KR20170121157A (ko) | 2017-11-01 |
CN107210271A (zh) | 2017-09-26 |
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