JP6399464B2 - フィンベース電子装置のための固定ソース拡散接合 - Google Patents

フィンベース電子装置のための固定ソース拡散接合 Download PDF

Info

Publication number
JP6399464B2
JP6399464B2 JP2016568050A JP2016568050A JP6399464B2 JP 6399464 B2 JP6399464 B2 JP 6399464B2 JP 2016568050 A JP2016568050 A JP 2016568050A JP 2016568050 A JP2016568050 A JP 2016568050A JP 6399464 B2 JP6399464 B2 JP 6399464B2
Authority
JP
Japan
Prior art keywords
fin
integrated circuit
insulating material
layer
circuit structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016568050A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017527099A5 (enExample
JP2017527099A (ja
Inventor
エム． ハフェズ、ワリド
エム． ハフェズ、ワリド
ジャン、チア−ホン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of JP2017527099A publication Critical patent/JP2017527099A/ja
Publication of JP2017527099A5 publication Critical patent/JP2017527099A5/ja
Application granted granted Critical
Publication of JP6399464B2 publication Critical patent/JP6399464B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H10D30/0512—Manufacture or treatment of FETs having PN junction gates of FETs having PN homojunction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/025—Manufacture or treatment of resistors having potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/43—Resistors having PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H10D30/0241—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] doping of vertical sidewalls, e.g. using tilted or multi-angled implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6215—Fin field-effect transistors [FinFET] having multiple independently-addressable gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/112—Field plates comprising multiple field plate segments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/87—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of PN-junction gate FETs

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Element Separation (AREA)
JP2016568050A 2014-07-14 2014-07-14 フィンベース電子装置のための固定ソース拡散接合 Active JP6399464B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2014/046525 WO2016010515A1 (en) 2014-07-14 2014-07-14 Solid-source diffused junction for fin-based electronics

Publications (3)

Publication Number Publication Date
JP2017527099A JP2017527099A (ja) 2017-09-14
JP2017527099A5 JP2017527099A5 (enExample) 2017-10-26
JP6399464B2 true JP6399464B2 (ja) 2018-10-03

Family

ID=55078851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016568050A Active JP6399464B2 (ja) 2014-07-14 2014-07-14 フィンベース電子装置のための固定ソース拡散接合

Country Status (7)

Country Link
US (6) US9842944B2 (enExample)
EP (2) EP3170207A4 (enExample)
JP (1) JP6399464B2 (enExample)
KR (1) KR102241181B1 (enExample)
CN (2) CN106471624B (enExample)
TW (3) TWI628801B (enExample)
WO (1) WO2016010515A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3170207A4 (en) 2014-07-14 2018-03-28 Intel Corporation Solid-source diffused junction for fin-based electronics
EP3311399A4 (en) * 2015-06-22 2019-02-27 Intel Corporation GLASS WITH TWO HEIGHTS FOR FINFET DOTING
US9847388B2 (en) * 2015-09-01 2017-12-19 International Business Machines Corporation High thermal budget compatible punch through stop integration using doped glass
US9976650B1 (en) * 2017-02-01 2018-05-22 Deere & Company Forkless synchronizer with sensor rail arrangement
WO2018182615A1 (en) * 2017-03-30 2018-10-04 Intel Corporation Vertically stacked transistors in a fin
US10401122B2 (en) 2017-06-08 2019-09-03 Springfield, Inc. Free floating handguard anchoring system
US20190172920A1 (en) * 2017-12-06 2019-06-06 Nanya Technology Corporation Junctionless transistor device and method for preparing the same
EP3732729A4 (en) * 2017-12-27 2021-07-28 INTEL Corporation FINFET-BASED CAPACITORS AND RESISTORS AND ASSOCIATED APPARATUS, SYSTEMS AND PROCESSES
US10325819B1 (en) * 2018-03-13 2019-06-18 Globalfoundries Inc. Methods, apparatus and system for providing a pre-RMG replacement metal contact for a finFET device
KR102813445B1 (ko) * 2019-10-02 2025-05-27 삼성전자주식회사 집적회로 소자 및 그 제조 방법
CN113921520B (zh) * 2021-09-29 2024-08-06 上海晶丰明源半导体股份有限公司 射频开关器件及其制造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06260647A (ja) * 1993-03-04 1994-09-16 Sony Corp Ｘｍｏｓトランジスタの作製方法
US20020011612A1 (en) * 2000-07-31 2002-01-31 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US7235436B1 (en) * 2003-07-08 2007-06-26 Advanced Micro Devices, Inc. Method for doping structures in FinFET devices
JP2005174964A (ja) * 2003-12-05 2005-06-30 National Institute Of Advanced Industrial & Technology 二重ゲート電界効果トランジスタ
JP4504214B2 (ja) * 2005-02-04 2010-07-14 株式会社東芝 Ｍｏｓ型半導体装置及びその製造方法
DE102005039365B4 (de) * 2005-08-19 2022-02-10 Infineon Technologies Ag Gate-gesteuertes Fin-Widerstandselement, welches als pinch - resistor arbeitet, zur Verwendung als ESD-Schutzelement in einem elektrischen Schaltkreis und Einrichtung zum Schutz vor elektrostatischen Entladungen in einem elektrischen Schaltkreis
US7402856B2 (en) * 2005-12-09 2008-07-22 Intel Corporation Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
US7560784B2 (en) * 2007-02-01 2009-07-14 International Business Machines Corporation Fin PIN diode
US8130547B2 (en) 2007-11-29 2012-03-06 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
US8264032B2 (en) 2009-09-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Accumulation type FinFET, circuits and fabrication method thereof
US8030144B2 (en) * 2009-10-09 2011-10-04 Globalfoundries Inc. Semiconductor device with stressed fin sections, and related fabrication methods
US8592918B2 (en) * 2009-10-28 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Forming inter-device STI regions and intra-device STI regions using different dielectric materials
US8158500B2 (en) * 2010-01-27 2012-04-17 International Business Machines Corporation Field effect transistors (FETS) and methods of manufacture
US8889494B2 (en) * 2010-12-29 2014-11-18 Globalfoundries Singapore Pte. Ltd. Finfet
US8435845B2 (en) * 2011-04-06 2013-05-07 International Business Machines Corporation Junction field effect transistor with an epitaxially grown gate structure
US8643108B2 (en) * 2011-08-19 2014-02-04 Altera Corporation Buffered finFET device
US9082853B2 (en) * 2012-10-31 2015-07-14 International Business Machines Corporation Bulk finFET with punchthrough stopper region and method of fabrication
US9299840B2 (en) * 2013-03-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods for forming the same
US9431497B2 (en) * 2013-05-21 2016-08-30 Globalfoundries Singapore Pte. Ltd. Transistor devices having an anti-fuse configuration and methods of forming the same
CN104218082B (zh) * 2013-06-04 2017-08-25 中芯国际集成电路制造(上海)有限公司 高迁移率鳍型场效应晶体管及其制造方法
US9293534B2 (en) * 2014-03-21 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of dislocations in source and drain regions of FinFET devices
CN104576383B (zh) * 2013-10-14 2017-09-12 中国科学院微电子研究所 一种FinFET结构及其制造方法
EP3170207A4 (en) * 2014-07-14 2018-03-28 Intel Corporation Solid-source diffused junction for fin-based electronics

Also Published As

Publication number Publication date
TW201727926A (zh) 2017-08-01
US20180158906A1 (en) 2018-06-07
US20200335582A1 (en) 2020-10-22
CN106471624A (zh) 2017-03-01
KR102241181B1 (ko) 2021-04-16
EP3170207A4 (en) 2018-03-28
CN112670349B (zh) 2024-09-17
US10355081B2 (en) 2019-07-16
CN112670349A (zh) 2021-04-16
CN106471624B (zh) 2021-01-05
US10741640B2 (en) 2020-08-11
TW201828482A (zh) 2018-08-01
KR20170028882A (ko) 2017-03-14
TW201614852A (en) 2016-04-16
TWI600166B (zh) 2017-09-21
EP3170207A1 (en) 2017-05-24
EP3300119A1 (en) 2018-03-28
US20190296105A1 (en) 2019-09-26
TWI664738B (zh) 2019-07-01
US9899472B2 (en) 2018-02-20
US11764260B2 (en) 2023-09-19
WO2016010515A1 (en) 2016-01-21
US9842944B2 (en) 2017-12-12
TWI628801B (zh) 2018-07-01
US20220102488A1 (en) 2022-03-31
US20170133461A1 (en) 2017-05-11
US11139370B2 (en) 2021-10-05
JP2017527099A (ja) 2017-09-14
US20170018658A1 (en) 2017-01-19

Similar Documents

Publication Publication Date Title
JP6399464B2 (ja) フィンベース電子装置のための固定ソース拡散接合
EP2898533B1 (en) Precision resistor for non-planar semiconductor device architecture
JP6440038B2 (ja) 高電圧電界効果トランジスタのための延長型ドレイン構造
CN107004708A (zh) 为了性能和栅极填充而优化栅极剖面
TW201721808A (zh) 在短通道互補金屬氧化物半導體（ｃｍｏｓ）晶片上的用於低洩漏的應用的長通道金屬氧化物半導體（ｍｏｓ）電晶體
KR102385395B1 (ko) Finfet 도핑을 위한 이중 높이 유리
TW201729424A (zh) 雙臨界電壓（ｖｔ）通道裝置及其製造方法
US11563098B2 (en) Transistor gate shape structuring approaches
US12438080B2 (en) And process for a precision resistor
TW202018951A (zh) 電晶體觸點區域強化
WO2018063343A1 (en) Systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in source and drain for low access and contact resistance of thin film transistors
CN110620144A (zh) 使用单个操作伪栅极去除的晶体管栅极结构化的方法
CN111052392A (zh) 具有非对称源极结构和漏极结构的iii-v族半导体器件
WO2018125191A1 (en) Subfin liner for finfet devices

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170710

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170821

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180320

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180619

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180807

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180824

R150 Certificate of patent or registration of utility model

Ref document number: 6399464

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250