JP6290534B2 - 半導体パッケージ及び半導体パッケージの製造方法 - Google Patents

半導体パッケージ及び半導体パッケージの製造方法 Download PDF

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Publication number
JP6290534B2
JP6290534B2 JP2012278247A JP2012278247A JP6290534B2 JP 6290534 B2 JP6290534 B2 JP 6290534B2 JP 2012278247 A JP2012278247 A JP 2012278247A JP 2012278247 A JP2012278247 A JP 2012278247A JP 6290534 B2 JP6290534 B2 JP 6290534B2
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JP
Japan
Prior art keywords
wiring pattern
insulating layer
wiring
layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2012278247A
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English (en)
Japanese (ja)
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JP2014123622A5 (https=
JP2014123622A (ja
Inventor
堀内　道夫
道夫 堀内
徳武　安衛
安衛 徳武
勇一 松田
勇一 松田
亮 深澤
亮 深澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2012278247A priority Critical patent/JP6290534B2/ja
Publication of JP2014123622A publication Critical patent/JP2014123622A/ja
Publication of JP2014123622A5 publication Critical patent/JP2014123622A5/ja
Application granted granted Critical
Publication of JP6290534B2 publication Critical patent/JP6290534B2/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2012278247A 2012-12-20 2012-12-20 半導体パッケージ及び半導体パッケージの製造方法 Active JP6290534B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012278247A JP6290534B2 (ja) 2012-12-20 2012-12-20 半導体パッケージ及び半導体パッケージの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012278247A JP6290534B2 (ja) 2012-12-20 2012-12-20 半導体パッケージ及び半導体パッケージの製造方法

Publications (3)

Publication Number Publication Date
JP2014123622A JP2014123622A (ja) 2014-07-03
JP2014123622A5 JP2014123622A5 (https=) 2016-01-07
JP6290534B2 true JP6290534B2 (ja) 2018-03-07

Family

ID=51403904

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012278247A Active JP6290534B2 (ja) 2012-12-20 2012-12-20 半導体パッケージ及び半導体パッケージの製造方法

Country Status (1)

Country Link
JP (1) JP6290534B2 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7223525B2 (ja) * 2018-08-09 2023-02-16 新光電気工業株式会社 インダクタ及びインダクタの製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001144203A (ja) * 1999-11-16 2001-05-25 Mitsubishi Electric Corp キャビティダウン型ｂｇａパッケージ
JP2003243604A (ja) * 2002-02-13 2003-08-29 Sony Corp 電子部品及び電子部品の製造方法
JP4865197B2 (ja) * 2004-06-30 2012-02-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP5068133B2 (ja) * 2007-10-17 2012-11-07 新光電気工業株式会社 半導体チップ積層構造体及び半導体装置
JP2009135221A (ja) * 2007-11-29 2009-06-18 Shinko Electric Ind Co Ltd 多層配線基板及びその製造方法ならびに半導体装置
JP2009224617A (ja) * 2008-03-17 2009-10-01 Shinko Electric Ind Co Ltd 配線基板
JP5262552B2 (ja) * 2008-10-14 2013-08-14 富士電機株式会社 半導体装置の製造方法及び半導体装置
JP2012169440A (ja) * 2011-02-14 2012-09-06 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP2014123622A (ja) 2014-07-03

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