JP6277270B2 - オプトエレクトロニクス半導体チップ、半導体部品、および、オプトエレクトロニクス半導体チップの製造方法 - Google Patents
オプトエレクトロニクス半導体チップ、半導体部品、および、オプトエレクトロニクス半導体チップの製造方法 Download PDFInfo
- Publication number
- JP6277270B2 JP6277270B2 JP2016528450A JP2016528450A JP6277270B2 JP 6277270 B2 JP6277270 B2 JP 6277270B2 JP 2016528450 A JP2016528450 A JP 2016528450A JP 2016528450 A JP2016528450 A JP 2016528450A JP 6277270 B2 JP6277270 B2 JP 6277270B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- carrier
- trench
- region
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 212
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 230000005693 optoelectronics Effects 0.000 title claims description 16
- 238000000034 method Methods 0.000 claims description 54
- 239000002131 composite material Substances 0.000 claims description 48
- 239000000463 material Substances 0.000 claims description 33
- 230000005855 radiation Effects 0.000 claims description 18
- 239000007769 metal material Substances 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 7
- 238000007373 indentation Methods 0.000 claims description 6
- 238000012986 modification Methods 0.000 claims description 6
- 230000004048 modification Effects 0.000 claims description 6
- 230000001427 coherent effect Effects 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 claims description 4
- 238000003475 lamination Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 78
- 230000015572 biosynthetic process Effects 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 7
- 238000000465 moulding Methods 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000003595 spectral effect Effects 0.000 description 4
- 238000005266 casting Methods 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000000608 laser ablation Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000010297 mechanical methods and process Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 238000003631 wet chemical etching Methods 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 101100008047 Caenorhabditis elegans cut-3 gene Proteins 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000012876 carrier material Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02002—Arrangements for conducting electric current to or from the device in operations
- H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Physics & Mathematics (AREA)
- Dicing (AREA)
- Led Device Packages (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Light Receiving Elements (AREA)
- Laser Beam Processing (AREA)
Description
Claims (20)
- オプトエレクトロニクス半導体チップ(1)、および、成形体(7)を有する半導体部品であって、
前記半導体チップ(1)は、キャリア(5)と、放射を発生させかつ/または受け取るために設けられた活性領域(20)を有する半導体ボディ(2)とを有し、
− 前記半導体ボディは、接続層(6)によって前記キャリア上に固定され;
− 前記キャリアは、前記半導体ボディに対向する第1の主面(53)と、前記半導体ボディとは反対側の第2の主面(54)との間に垂直方向に延在し、側面(51)が前記第1の主面と前記第2の主面とを互いに接続し;
− 前記キャリアの前記側面の第1の領域(511)が切欠き部(55)を有し;
− 前記側面の第2の領域が前記切欠き部と前記第2の主面との間に垂直方向に延在し;
− 前記半導体チップは、前記半導体ボディと前記第1の領域とを、それぞれ、少なくとも部分的に被覆している絶縁層(4)を有し;
− 前記第2の領域には、前記絶縁層が存在せず、
− 前記成形体は、前記半導体チップ上に成形され、前記キャリアの前記側面の前記第1の領域と前記第2の領域とを、それぞれ、少なくとも一部の領域において被覆し;
− 前記半導体部品は、外部と電気的接続を行うために、前記成形体の前面側、および/または、後面側において、一以上の電気接触部を備え、
− 前記半導体部品は、前記半導体チップ(1)の前記キャリアの前記第2の主面とは反対側の前面(11)から、前記キャリアの前記第1の領域を介して前記成形体の前記前面(71)まで引かれている接触トラック(8)を有する、半導体部品。 - 前記絶縁層は、前記第1の領域を完全に被覆する、請求項1に記載の半導体部品。
- 前記絶縁層は、前記接触トラックは、いずれの位置においても、前記キャリアと直接的には隣接しない、請求項1又は2に記載の半導体部品。
- 前記キャリアは、導電性である、請求項1〜3のいずれか一項に記載の半導体部品。
- 前記半導体チップの前面には、前記成形体の材料が存在しない、請求項1〜4のいずれか一項に記載の半導体部品。
- 前記絶縁層は、前記接続層の前記半導体ボディを横方向に越えて延出する部分を完全に被覆している、請求項1〜5のいずれか一項に記載の半導体部品。
- 前記切欠き部の垂直方向の広がりは、前記キャリアの垂直方向の広がりの10%〜70%(両端値を含む)である、請求項1〜6のいずれか一項に記載の半導体部品。
- 前記キャリアの更なる側面には、前記切欠き部が存在しない、請求項1〜7のいずれか一項に記載の半導体部品。
- 複数の半導体チップの製造方法であって、
a) 放射を発生させかつ/または受け取るために設けられた活性領域(20)を有する半導体積層体(200)であって複数の半導体ボディ(2)に区画されている半導体積層体(200)と、前記半導体積層体が配置されているキャリア複合体(50)とを有する複合体(9)を設けるステップと;
b) 隣接する半導体ボディ間に少なくとも一部の領域において延在し、かつ、前記キャリア複合体内まで延在するトレンチ型くぼみ部(56)を形成するステップと;
c) 前記半導体積層体と前記トレンチ型くぼみ部の側面(560)とを、それぞれ、少なくとも一部の領域において被覆する絶縁層(4)を形成するステップと;
d) 前記複合体を前記複数の半導体チップに個片化するステップであって、前記個片化するステップは、前記トレンチ型くぼみ部に沿って少なくとも一部の領域において延在する個片化切込み部(3)によって行われるステップと、を含み、
前記個片化切込み部が完全に前記トレンチ型くぼみ部の内側に形成され、電気的接触面(81)が前記半導体ボディそれぞれの上に形成され、隣接する半導体ボディ間の前記トレンチ型くぼみ部に沿って延在する前記個片化切込み部は、それぞれ、前記個片化切込み部の中心線(31)が、関連する前記トレンチ型くぼみ部の中心線(561)よりも、前記隣接する半導体ボディの最も近い接触面から離隔するように形成される、複数の半導体チップの製造方法。 - 前記キャリア複合体の前記半導体積層体に対向する前面(501)には、ステップd)において、前記トレンチ型くぼみ部の領域内に金属材料が存在しない、請求項9に記載の方法。
- 前記キャリア複合体の前記半導体積層体とは反対側の後面(502)には、ステップd)において、金属材料が存在しない、請求項9または10に記載の方法。
- 前記キャリア複合体は、ステップb)後に薄膜化される、請求項9〜11のいずれか一項に記載の方法。
- ステップd)において前記トレンチ型くぼみ部に沿って延在する前記個片化切込み部の幅は、前記トレンチ型くぼみ部の幅よりも小さい、請求項9〜12のいずれか一項に記載の方法。
- 前記キャリア複合体は、ステップd)において、前記トレンチ型くぼみ部とは反対側の面から個片化される、請求項9〜13のいずれか一項に記載の方法。
- 前記個片化切込み部の前記トレンチ型くぼみ部に対する位置決めは、前記キャリア複合体を通した前記トレンチ型くぼみ部の光学認識によって行われる、請求項14に記載の方法。
- レーザ放射による垂直方向における完全なまたは局所のみの材料改質が、ステップd)において、前記キャリア複合体内に行われる、請求項9〜15のいずれか一項に記載の方法。
- 化学的な材料除去が、ステップd)において、前記キャリア複合体内に行われる、請求項9〜15のいずれか一項に記載の方法。
- 前記トレンチ型くぼみ部は、ステップb)において、コヒーレント放射によって、化学的に、および/または、機械的に形成される、請求項9〜17のいずれか一項に記載の方法。
- 前記個片化するステップは、第1の方向と、当該第1の方向に対して斜め方向又は垂直方向に延びる第2の方向に沿って実行され、
前記トレンチ型くぼみ部は、前記第1の方向に沿って互いに平行に延び、前記第1の方向に沿って互いに隣接して配置された前記半導体ボディ間には形成されない、請求項9〜18のいずれか一項に記載の方法。 - 前記電気的接触面は、前記半導体ボディそれぞれの上の中心には設けられず、
前記トレンチ型くぼみ部の一方側に設けられた半導体チップの前記電気的接触面は、前記トレンチ型くぼみ部の他方側に設けられた半導体チップの前記電気的接触面よりも前記トレンチ型くぼみ部に近接する、請求項9〜19のいずれか一項に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102013107971.7A DE102013107971A1 (de) | 2013-07-25 | 2013-07-25 | Optoelektronischer Halbleiterchip, Halbleiterbauelement und Verfahren zur Herstellung von optoelektronischen Halbleiterchips |
DE102013107971.7 | 2013-07-25 | ||
PCT/EP2014/065445 WO2015011028A1 (de) | 2013-07-25 | 2014-07-17 | Optoelektronischer halbleiterchip, halbleiterbauelement und verfahren zur herstellung von optoelektronischen halbleiterchips |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016531425A JP2016531425A (ja) | 2016-10-06 |
JP6277270B2 true JP6277270B2 (ja) | 2018-02-07 |
Family
ID=51212836
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016528450A Expired - Fee Related JP6277270B2 (ja) | 2013-07-25 | 2014-07-17 | オプトエレクトロニクス半導体チップ、半導体部品、および、オプトエレクトロニクス半導体チップの製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20160163939A1 (ja) |
JP (1) | JP6277270B2 (ja) |
CN (1) | CN105580145B (ja) |
DE (1) | DE102013107971A1 (ja) |
WO (1) | WO2015011028A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102014116141B4 (de) | 2014-11-05 | 2022-07-28 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung zumindest eines optoelektronischen Halbleiterchips, optoelektronischer Halbleiterchip sowie optoelektronisches Halbleiterbauelement |
DE102017119344A1 (de) * | 2017-08-24 | 2019-02-28 | Osram Opto Semiconductors Gmbh | Träger und Bauteil mit Pufferschicht sowie Verfahren zur Herstellung eines Bauteils |
DE102019212944A1 (de) * | 2019-08-28 | 2021-03-04 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterbauelement, vorrichtung mit einem halbleiterbauelement und verfahren zur herstellung von halbleiterbauelementen |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06283757A (ja) * | 1993-03-25 | 1994-10-07 | Kyocera Corp | Ledアレイの製造方法 |
JPH0832110A (ja) * | 1994-07-19 | 1996-02-02 | Oki Electric Ind Co Ltd | 端面発光型led、端面発光型発光素子の製造方法、端面発光型発光素子の発光特性測定方法 |
JPH10242574A (ja) * | 1997-02-25 | 1998-09-11 | Hitachi Ltd | 半導体光素子 |
JPH10275936A (ja) * | 1997-03-28 | 1998-10-13 | Rohm Co Ltd | 半導体発光素子の製法 |
US6614056B1 (en) * | 1999-12-01 | 2003-09-02 | Cree Lighting Company | Scalable led with improved current spreading structures |
US6611050B1 (en) * | 2000-03-30 | 2003-08-26 | International Business Machines Corporation | Chip edge interconnect apparatus and method |
DE10038671A1 (de) * | 2000-08-08 | 2002-02-28 | Osram Opto Semiconductors Gmbh | Halbleiterchip für die Optoelektronik |
US6869861B1 (en) * | 2001-03-08 | 2005-03-22 | Amkor Technology, Inc. | Back-side wafer singulation method |
CN1241253C (zh) * | 2002-06-24 | 2006-02-08 | 丰田合成株式会社 | 半导体元件的制造方法 |
US6995032B2 (en) * | 2002-07-19 | 2006-02-07 | Cree, Inc. | Trench cut light emitting diodes and methods of fabricating same |
US6933212B1 (en) * | 2004-01-13 | 2005-08-23 | National Semiconductor Corporation | Apparatus and method for dicing semiconductor wafers |
US7129114B2 (en) * | 2004-03-10 | 2006-10-31 | Micron Technology, Inc. | Methods relating to singulating semiconductor wafers and wafer scale assemblies |
JP2006278751A (ja) * | 2005-03-29 | 2006-10-12 | Mitsubishi Cable Ind Ltd | GaN系半導体発光素子 |
US7687322B1 (en) * | 2005-10-11 | 2010-03-30 | SemiLEDs Optoelectronics Co., Ltd. | Method for removing semiconductor street material |
JP4774928B2 (ja) * | 2005-11-07 | 2011-09-21 | 日亜化学工業株式会社 | 半導体素子の製造方法 |
US20090102070A1 (en) * | 2007-10-22 | 2009-04-23 | International Business Machines Corporation | Alignment Marks on the Edge of Wafers and Methods for Same |
US8211781B2 (en) * | 2008-11-10 | 2012-07-03 | Stanley Electric Co., Ltd. | Semiconductor manufacturing method |
US8216867B2 (en) * | 2009-06-10 | 2012-07-10 | Cree, Inc. | Front end scribing of light emitting diode (LED) wafers and resulting devices |
DE102009058345B4 (de) * | 2009-12-15 | 2021-05-12 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterlaser |
JP2011129718A (ja) * | 2009-12-17 | 2011-06-30 | Showa Denko Kk | 基板、テンプレート基板、半導体発光素子、半導体発光素子の製造方法、半導体発光素子を用いた照明装置および電子機器 |
DE102009058796A1 (de) * | 2009-12-18 | 2011-06-22 | OSRAM Opto Semiconductors GmbH, 93055 | Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements |
KR101429837B1 (ko) * | 2010-01-19 | 2014-08-12 | 샤프 가부시키가이샤 | 기능 소자 및 그의 제조방법 |
JP5195798B2 (ja) * | 2010-03-23 | 2013-05-15 | 豊田合成株式会社 | 半導体発光素子の製造方法 |
GB2484711A (en) * | 2010-10-21 | 2012-04-25 | Optovate Ltd | Illumination Apparatus |
JP2012138452A (ja) * | 2010-12-27 | 2012-07-19 | Panasonic Corp | 窒化物半導体発光素子の製造方法および窒化物半導体発光素子 |
JP2013016576A (ja) * | 2011-07-01 | 2013-01-24 | Fuji Mach Mfg Co Ltd | 半導体パッケージ |
DE102011054891B4 (de) * | 2011-10-28 | 2017-10-19 | Osram Opto Semiconductors Gmbh | Verfahren zum Durchtrennen eines Halbleiterbauelementverbunds |
-
2013
- 2013-07-25 DE DE102013107971.7A patent/DE102013107971A1/de not_active Withdrawn
-
2014
- 2014-07-17 US US14/906,724 patent/US20160163939A1/en not_active Abandoned
- 2014-07-17 JP JP2016528450A patent/JP6277270B2/ja not_active Expired - Fee Related
- 2014-07-17 WO PCT/EP2014/065445 patent/WO2015011028A1/de active Application Filing
- 2014-07-17 CN CN201480053076.9A patent/CN105580145B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN105580145B (zh) | 2018-07-06 |
DE102013107971A1 (de) | 2015-01-29 |
WO2015011028A1 (de) | 2015-01-29 |
JP2016531425A (ja) | 2016-10-06 |
US20160163939A1 (en) | 2016-06-09 |
CN105580145A (zh) | 2016-05-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9449879B2 (en) | Method of severing a semiconductor device composite | |
JP6204600B2 (ja) | オプトエレクトロニクス半導体デバイスを製造する方法および半導体デバイス | |
US9252079B2 (en) | Substrate, method of fabricating the same, and application the same | |
US10236419B2 (en) | Component and metod for producing a component | |
US7867879B2 (en) | Method for dividing a semiconductor substrate and a method for producing a semiconductor circuit arrangement | |
US9721940B2 (en) | Radiation-emitting semiconductor chip and method of producing radiation-emitting semiconductor chips | |
JP5759004B2 (ja) | オプトエレクトロニクス半導体チップ | |
US9825198B2 (en) | Method of producing a plurality of optoelectronic semiconductor chips, and optoelectronic semiconductor chip | |
US8860063B2 (en) | Light-emitting diode chip | |
JP2015532785A (ja) | 反射性電極を有するオプトエレクトロニクス半導体チップの製造方法 | |
US9530935B2 (en) | Method for fabricating a plurality of opto-electronic semiconductor chips, and opto-electronic semiconductor chip | |
KR20110082540A (ko) | 광전 반도체 소자의 제조 방법 및 광전 반도체 소자 | |
JP2014509085A (ja) | 少なくとも1個のオプトエレクトロニクス半導体チップの製造方法 | |
KR20160013875A (ko) | 복수의 광전자 반도체 칩을 제조하는 방법 및 광전자 반도체 칩 | |
US20230197788A1 (en) | Methods, devices, and systems related to forming semiconductor power devices with a handle substrate | |
JP6277270B2 (ja) | オプトエレクトロニクス半導体チップ、半導体部品、および、オプトエレクトロニクス半導体チップの製造方法 | |
KR102557927B1 (ko) | 복수의 반도체 칩들의 제조 방법 및 반도체 칩 | |
JP2018517305A (ja) | オプトエレクトロニクス変換半導体チップの製造方法および変換半導体チップの複合体 | |
US10903119B2 (en) | Semiconductor chip, method of producing a semiconductor chip and apparatus having a plurality of semiconductor chips | |
US10439096B2 (en) | Method for manufacturing at least one optoelectronic semiconductor chip | |
US9614033B2 (en) | Semiconductor device including an isolation structure and method of manufacturing a semiconductor device | |
KR20160072762A (ko) | 전계 완화 패턴층을 구비하는 질화물계 다이오드 소자 및 이의 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20161108 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170118 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170530 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170822 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20171226 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180115 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6277270 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |