JP2014509085A - 少なくとも1個のオプトエレクトロニクス半導体チップの製造方法 - Google Patents
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Abstract
【選択図】図2A
Description
− 成長支持体と、活性領域を有する半導体積層体とを備えた少なくとも1つのオプトエレクトロニクス構造を形成するステップであって、半導体積層体が成長支持体の上にエピタキシャルに堆積される、ステップと、
− キャリアを形成するステップと、
− 少なくとも1つのオプトエレクトロニクス構造を、成長支持体とは反対側のオプトエレクトロニクス構造の面によって、キャリアの上に貼り付けるステップと、
− 少なくとも1つのオプトエレクトロニクス構造を保護材料によって被覆するステップであって、保護材料が、キャリアとは反対側の成長支持体の外面と、成長支持体の側面と、半導体積層体の側面とを覆う、ステップと、
− 少なくとも1つのオプトエレクトロニクス構造の半導体積層体から成長支持体を剥離するステップと、
を含んでいる。
Claims (11)
- 少なくとも1個のオプトエレクトロニクス半導体チップを製造する方法であって、
− 成長支持体(1)と、活性領域(23)を有する半導体積層体(20)とを備えた少なくとも1つのオプトエレクトロニクス構造(2)を形成するステップであって、前記半導体積層体(20)が前記成長支持体(1)の上にエピタキシャルに堆積される、前記ステップと、
− キャリア(4)を形成するステップと、
− 前記少なくとも1つのオプトエレクトロニクス構造(2)を、前記成長支持体(1)とは反対側の前記オプトエレクトロニクス構造(2)の面によって、前記キャリア(4)の上に貼り付けるステップと、
− 前記少なくとも1つのオプトエレクトロニクス構造(2)を保護材料(5)によって被覆するステップであって、前記保護材料(5)が、前記キャリア(4)とは反対側の前記成長支持体(1)の外面と、前記成長支持体(1)の側面と、前記半導体積層体(20)の側面とを覆う、前記ステップと、
− 前記少なくとも1つのオプトエレクトロニクス構造(2)の前記半導体積層体(20)から前記成長支持体(1)を剥離するステップと、
を含んでいる、方法。 - − 前記保護材料(5)がパリレンを含んでおり、
− 前記少なくとも1つのオプトエレクトロニクス構造(2)を被覆した後、前記保護材料(5)が、前記少なくとも1つのオプトエレクトロニクス構造(2)の、前記キャリア(4)によって覆われていない外面を完全に覆っており、前記少なくとも1つのオプトエレクトロニクス構造(2)の側の前記キャリア(4)の上面(4a)を少なくとも部分的に覆っており、
− 前記成長支持体(1)を剥離する前に、前記少なくとも1つのオプトエレクトロニクス構造(2)とは反対側の前記保護材料(5)の外面が、少なくとも部分的に反射材料(7)によって被覆される、
請求項1に記載の方法。 - 前記少なくとも1つのオプトエレクトロニクス構造(2)を被覆した後、前記保護材料(5)が、前記少なくとも1つのオプトエレクトロニクス構造(2)の、前記キャリア(4)によって覆われていない外面を完全に覆っており、前記少なくとも1つのオプトエレクトロニクス構造(2)の側の前記キャリア(4)の上面(4a)を少なくとも部分的に覆っている、
請求項1または請求項2のいずれかに記載の方法。 - 前記少なくとも1つのオプトエレクトロニクス構造(2)の前記半導体積層体(20)から前記成長支持体(1)を剥離した後、残っている保護材料(5)が除去される、
請求項1から請求項3のいずれかに記載の方法。 - 前記成長支持体(1)を剥離する前に、前記少なくとも1つのオプトエレクトロニクス構造(2)とは反対側の前記保護材料(5)の外面が、少なくとも部分的に反射材料(7)によって被覆される、
請求項1から請求項4のいずれかに記載の方法。 - 前記反射材料(7)が、前記保護材料(5)の露出した外面を完全に覆う、
請求項5に記載の方法。 - 前記成長支持体(1)がエッチング液を使用して剥離され、前記保護材料(5)が前記エッチング液による攻撃の影響を受けない、
請求項1から請求項6のいずれかに記載の方法。 - 前記保護材料(5)が、放射に対して透過性のプラスチック材料からなる、
請求項1から請求項7のいずれかに記載の方法。 - 前記保護材料(5)がパリレンを含んでいる、
請求項1から請求項8のいずれかに記載の方法。 - 前記成長支持体(1)がシリコンを含んでおり、前記半導体積層体(20)が窒化物化合物半導体材料系である、
請求項1から請求項9のいずれかに記載の方法。 - 前記少なくとも1つのオプトエレクトロニクス構造(2)が、前記キャリア(4)の側の自身の面に、n側接点(27)およびp側接点(28)を備えており、前記接点(27,28)が、前記少なくとも1つのオプトエレクトロニクス構造(2)を前記キャリア(4)の上に貼り付けるときに、前記キャリア(4)に導電接続される、
請求項1から請求項10のいずれかに記載の方法。
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DE201110013821 DE102011013821A1 (de) | 2011-03-14 | 2011-03-14 | Verfahren zur Herstellung zumindest eines optoelektronischen Halbleiterchips |
DE102011013821.8 | 2011-03-14 | ||
PCT/EP2012/054270 WO2012123410A1 (de) | 2011-03-14 | 2012-03-12 | Verfahren zur herstellung zumindest eines optoelektronischen halbleiterchips |
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US (1) | US9076941B2 (ja) |
JP (1) | JP2014509085A (ja) |
KR (1) | KR20140006973A (ja) |
CN (1) | CN103430330B (ja) |
DE (1) | DE102011013821A1 (ja) |
WO (1) | WO2012123410A1 (ja) |
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- 2012-03-12 US US14/004,442 patent/US9076941B2/en active Active
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- 2012-03-12 JP JP2013558392A patent/JP2014509085A/ja active Pending
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KR20150141790A (ko) * | 2014-06-10 | 2015-12-21 | 엘지이노텍 주식회사 | 발광소자 및 이를 구비한 발광소자 패키지 |
KR102164087B1 (ko) | 2014-06-10 | 2020-10-12 | 엘지이노텍 주식회사 | 발광소자 및 이를 구비한 발광소자 패키지 |
KR20150142738A (ko) * | 2014-06-11 | 2015-12-23 | 엘지이노텍 주식회사 | 발광소자 및 조명시스템 |
KR102153125B1 (ko) | 2014-06-11 | 2020-09-07 | 엘지이노텍 주식회사 | 발광소자 및 조명시스템 |
Also Published As
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WO2012123410A1 (de) | 2012-09-20 |
US20140051194A1 (en) | 2014-02-20 |
CN103430330A (zh) | 2013-12-04 |
KR20140006973A (ko) | 2014-01-16 |
US9076941B2 (en) | 2015-07-07 |
DE102011013821A1 (de) | 2012-09-20 |
CN103430330B (zh) | 2016-11-23 |
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