JP6245419B1 - 半導体装置、半導体装置の製造方法 - Google Patents
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Abstract
Description
本願の発明に係る他の半導体装置の製造方法は、基板の上に、第2導電型の第1リッジ構造を有する半導体レーザ部と、第2導電型の第2リッジ構造を有し該半導体レーザ部に接する光変調器又は光導波路である隣接部と、を形成する工程と、該半導体レーザ部と該隣接部の境界直上に、第1導電型の不純物をドープしたエピタキシャル成長によって、該第1リッジ構造と該第2リッジ構造に接する補強用リッジを形成する工程と、を備えたことを特徴とする。
図1は、実施の形態1に係る半導体装置10の斜視図である。半導体装置10は、半導体レーザ部12と、EA(Electro-Absorption)変調器で構成された隣接部14を集積したリッジ型光集積素子を構成している。隣接部14は、EA変調器以外の光変調器又は光導波路とすることができる。
図12は、実施の形態2に係る半導体装置の斜視図である。第1リッジ構造R1は、第1接触部Rbと、第1接触部Rbに接する第1本体部Raを有している。第2リッジ構造R2は、第2接触部Rdと、第2接触部Rdに接する第2本体部Rcを有している。第1接触部Rbは、第2リッジ構造R2側で幅が最大になっている。すなわち、第1接触部Rbの幅は第1本体部Ra側で最小となり、第2リッジ構造R2に近づくほど大きくなり、第2リッジ構造R2側で最大となっている。
図15は、実施の形態3に係る半導体装置の斜視図である。第1接触部Rbは、中央部Rfと、中央部Rfの左右に設けられた端部Re、Rgを備えている。中央部Rfにおける活性層20と第1上クラッド層22はp型である。これに対し、端部Re、Rgにおける活性層20と第1上クラッド層22はn型である。
図18は、別の変形例に係る半導体装置の斜視図である。実施の形態3では導電型変更工程で不純物注入又は不純物拡散を採用したが、エピタキシャル成長で第1導電型のリッジを形成してもよい。第1リッジ構造R1と第2リッジ構造R2はp型の導電型を有する。第1リッジ構造R1と第2リッジ構造R2の側面に補強用リッジR3、R4が形成されている。補強用リッジR3、R4はn型の導電型を有する。補強用リッジR3、R4は第1リッジ構造R1と第2リッジ構造R2とは別の工程であるエピタキシャル成長工程で形成されたものである。
Claims (8)
- 基板と、
前記基板の上に形成され、同一組成の活性層と第1リッジ構造を有する半導体レーザ部と、
前記基板の上に形成され、同一組成のコア層と第2リッジ構造を有し、前記半導体レーザ部に接する光変調器又は光導波路である隣接部と、を備え、
前記第1リッジ構造は前記第2リッジ構造に接する第1接触部で幅が最大になり、前記第2リッジ構造は前記第1リッジ構造に接する第2接触部で幅が最大になり、
前記第1リッジ構造と前記第2リッジ構造の導電型は、前記第1接触部と前記第2接触部の端部では第1導電型であり、それ以外の部分では第2導電型であることを特徴とする半導体装置。 - 前記第1リッジ構造と前記第2リッジ構造の第2導電型の部分の幅は一定であることを特徴とする請求項1に記載の半導体装置。
- 前記第1導電型はn型であり、前記第2導電型はp型であり、前記第1導電型の部分のn型半導体の密度は1E+18cm −3 以上であることを特徴とする請求項1又は2に記載の半導体装置。
- 前記第1接触部と前記第2接触部の端部にはSi、S、Se又はTeがドープされたことを特徴とする請求項3に記載の半導体装置。
- 基板の上に、活性層とコア層が隣接して設けられた多層構造を形成する成膜工程と、
前記多層構造の上に、前記活性層の直上の第1部分と、前記コア層の直上の第2部分と、前記第1部分と前記第2部分を接続し、前記活性層と前記コア層の境界直上に設けられ、前記第1部分と前記第2部分より幅が大きい境界部分と、を有するマスクを形成するマスク工程と、
前記多層構造のうち、前記マスクから露出した部分を前記活性層又は前記コア層が露出するまでエッチングするエッチング工程と、を備え、
前記成膜工程の直後の前記活性層と前記コア層は第2導電型であり、
前記成膜工程の後、前記マスク工程の前に、平面視で前記活性層と前記コア層の境界を含む境界領域の両端の前記活性層と前記コア層を第1導電型にする導電型変更工程を備え、
前記マスクの前記境界部分は、前記境界領域の両端を覆い、前記エッチング工程では前記マスクから露出した前記活性層と前記コア層をエッチングすることを特徴とする半導体装置の製造方法。 - 前記導電型変更工程では前記境界領域の両端に第1導電型の不純物を注入することを特徴とする請求項5に記載の半導体装置の製造方法。
- 前記導電型変更工程では前記境界領域の両端に第1導電型の不純物を拡散させることを特徴とする請求項5に記載の半導体装置の製造方法。
- 基板の上に、第2導電型の第1リッジ構造を有する半導体レーザ部と、第2導電型の第2リッジ構造を有し前記半導体レーザ部に接する光変調器又は光導波路である隣接部と、を形成する工程と、
前記半導体レーザ部と前記隣接部の境界直上に、第1導電型の不純物をドープしたエピタキシャル成長によって、前記第1リッジ構造と前記第2リッジ構造に接する補強用リッジを形成する工程と、を備えたことを特徴とする半導体装置の製造方法。
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JPH10505954A (ja) * | 1994-09-14 | 1998-06-09 | ブリティッシュ・テレコミュニケーションズ・パブリック・リミテッド・カンパニー | 光デバイス |
US20040145800A1 (en) * | 1997-09-12 | 2004-07-29 | Avanex Corporation, A Delaware Corporation | Large surface amplifier with multimode interferometer |
WO2006077641A1 (ja) * | 2005-01-20 | 2006-07-27 | Fujitsu Limited | 光導波路デバイス及び半導体デバイス |
JP2010226062A (ja) * | 2009-03-25 | 2010-10-07 | Fujitsu Ltd | 光導波素子とその製造方法、半導体素子、レーザモジュール及び光伝送システム |
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US10862268B2 (en) | 2020-12-08 |
CN110537302B (zh) | 2021-06-15 |
US20200021076A1 (en) | 2020-01-16 |
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