JP6219224B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP6219224B2
JP6219224B2 JP2014087027A JP2014087027A JP6219224B2 JP 6219224 B2 JP6219224 B2 JP 6219224B2 JP 2014087027 A JP2014087027 A JP 2014087027A JP 2014087027 A JP2014087027 A JP 2014087027A JP 6219224 B2 JP6219224 B2 JP 6219224B2
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Japan
Prior art keywords
conductivity type
semiconductor layer
type region
semiconductor device
semiconductor
Prior art date
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JP2014087027A
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English (en)
Japanese (ja)
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JP2015207649A (ja
JP2015207649A5 (enExample
Inventor
久満 鈴木
久満 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2014087027A priority Critical patent/JP6219224B2/ja
Priority to US14/679,051 priority patent/US9461036B2/en
Publication of JP2015207649A publication Critical patent/JP2015207649A/ja
Publication of JP2015207649A5 publication Critical patent/JP2015207649A5/ja
Application granted granted Critical
Publication of JP6219224B2 publication Critical patent/JP6219224B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6211—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2014087027A 2014-04-21 2014-04-21 半導体装置 Active JP6219224B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014087027A JP6219224B2 (ja) 2014-04-21 2014-04-21 半導体装置
US14/679,051 US9461036B2 (en) 2014-04-21 2015-04-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014087027A JP6219224B2 (ja) 2014-04-21 2014-04-21 半導体装置

Publications (3)

Publication Number Publication Date
JP2015207649A JP2015207649A (ja) 2015-11-19
JP2015207649A5 JP2015207649A5 (enExample) 2016-11-10
JP6219224B2 true JP6219224B2 (ja) 2017-10-25

Family

ID=54322662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014087027A Active JP6219224B2 (ja) 2014-04-21 2014-04-21 半導体装置

Country Status (2)

Country Link
US (1) US9461036B2 (enExample)
JP (1) JP6219224B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10665702B2 (en) 2017-12-27 2020-05-26 Samsung Electronics Co., Ltd. Vertical bipolar transistors
FR3087048B1 (fr) 2018-10-08 2021-11-12 St Microelectronics Sa Transistor bipolaire
FR3087047B1 (fr) 2018-10-08 2021-10-22 St Microelectronics Sa Transistor bipolaire
FR3113539B1 (fr) 2020-08-24 2022-09-23 St Microelectronics Crolles 2 Sas Transistor bipolaire

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2768719B2 (ja) * 1988-11-21 1998-06-25 株式会社日立製作所 半導体装置及び半導体記憶装置
US4868135A (en) * 1988-12-21 1989-09-19 International Business Machines Corporation Method for manufacturing a Bi-CMOS device
JPH0344937A (ja) * 1989-07-13 1991-02-26 Nippon Telegr & Teleph Corp <Ntt> バイポーラトランジスタ及びその製造方法
JPH0590278A (ja) 1991-09-30 1993-04-09 Nec Corp 半導体装置
JP2005236084A (ja) 2004-02-20 2005-09-02 Toshiba Corp 縦型バイポーラトランジスタ及びその製造方法
US7288829B2 (en) * 2004-11-10 2007-10-30 International Business Machines Corporation Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide
JP2007165780A (ja) 2005-12-16 2007-06-28 Toshiba Corp 半導体装置
JP2011119344A (ja) 2009-12-01 2011-06-16 Panasonic Corp 半導体装置及びその製造方法
US20110147840A1 (en) 2009-12-23 2011-06-23 Cea Stephen M Wrap-around contacts for finfet and tri-gate devices

Also Published As

Publication number Publication date
US20150303189A1 (en) 2015-10-22
JP2015207649A (ja) 2015-11-19
US9461036B2 (en) 2016-10-04

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