JP6085166B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6085166B2 JP6085166B2 JP2012278560A JP2012278560A JP6085166B2 JP 6085166 B2 JP6085166 B2 JP 6085166B2 JP 2012278560 A JP2012278560 A JP 2012278560A JP 2012278560 A JP2012278560 A JP 2012278560A JP 6085166 B2 JP6085166 B2 JP 6085166B2
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- type diffusion
- diffusion region
- pad
- region
- semiconductor substrate
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- 239000004065 semiconductor Substances 0.000 title claims description 52
- 238000009792 diffusion process Methods 0.000 claims description 92
- 239000000758 substrate Substances 0.000 claims description 26
- 239000000969 carrier Substances 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
パッド11へのサージによる少数キャリア(電子)は、ESD保護回路の領域のN型拡散領域21(保護トランジスタのドレインあるいは保護ダイオードのカソード)からP型の半導体基板27に漏れ出ることがある。この少数キャリアは、半導体基板27から、接地パッド12に接続されるP型拡散領域22に、流れ込み、吸収される。P型拡散領域22に吸収されなかった少数キャリアは、半導体基板27から、電源パッド13に接続されるN型拡散領域23〜24に、強制的に引き抜かれる。N型拡散領域23〜24に引き抜かれなかった少数キャリアは、半導体基板27から、接地パッド12に接続されるP型拡散領域25に、流れ込み、吸収される。つまり、パッド11へのサージによる少数キャリアを、P型拡散領域22とP型拡散領域25とN型ウェル24内部のN型拡散領域23との3重ガードリングにより、半導体基板27から逃がすのである。
12 接地パッド
13 電源パッド
21 N型拡散領域
22 P型拡散領域
23 N型拡散領域
24 N型ウェル
25 P型拡散領域
26 N型ウェル
27 半導体基板
Claims (4)
- パッド、接地パッド、および電源パッドを有するP型の半導体基板と、
前記半導体基板に設けられ、前記パッドに接続された第一N型拡散領域と、
前記半導体基板に設けられた内部回路の領域と、
前記第一N型拡散領域と前記内部回路の領域との間に設けられた、
第一P型拡散領域と、
第二P型拡散領域と、
前記第一P型拡散領域と前記第二P型拡散領域とに挟まれた第二N型拡散領域と、の3重ガードリングを有する、前記パッドへのサージにより前記半導体基板に発生する少数キャリアを捕獲する少数キャリア捕獲領域と、
を備え、
前記第一P型拡散領域と前記第二P型拡散領域とは、離間して配置された金属膜配線を介して、それぞれ前記接地パッドに接続され、
前記第二N型拡散領域は、前記電源パッドに接続されている、
ことを特徴とする半導体装置。 - ソース及びゲートが前記接地パッドに接続され、前記第一N型拡散領域であるドレインが前記パッドに接続された、ESD保護回路として機能するNMOSトランジスタをさらに備えることを特徴とする請求項1記載の半導体装置。
- ソースが前記接地パッドに接続され、前記第一N型拡散領域であるドレインが前記パッドに接続されたオープンドレイン出力のNMOSトランジスタをさらに備えることを特徴とする請求項1記載の半導体装置。
- パッド、接地パッド、および電源パッドを有するP型の半導体基板と、
前記半導体基板に第一N型拡散領域を介して設けられ、前記パッドに接続されたパッド接続用P型拡散領域と、
前記半導体基板に設けられた内部回路の領域と、
前記パッド接続用P型拡散領域と前記内部回路の領域との間に設けられた、
第一P型拡散領域と、
第二P型拡散領域と、
前記第一P型拡散領域と前記第二P型拡散領域とに挟まれた第二N型拡散領域と、の3重ガードリングを有する、
前記パッドへのサージにより前記半導体基板に発生する少数キャリアを捕獲する少数キャリア捕獲領域と、
を備え、
前記第一P型拡散領域と前記第二P型拡散領域とは、離間して配置された金属膜配線を介して、それぞれ前記接地パッドに接続され、
前記第二N型拡散領域は、前記電源パッドに接続され、
ソースが前記電源パッドに接続され、前記パッド接続用P型拡散領域であるドレインが前記パッドに接続されたオープンドレイン出力のPMOSトランジスタをさらに備える、
ことを特徴とする半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012278560A JP6085166B2 (ja) | 2012-12-20 | 2012-12-20 | 半導体装置 |
TW102145872A TWI595625B (zh) | 2012-12-20 | 2013-12-12 | 半導體裝置 |
KR1020130156173A KR102145169B1 (ko) | 2012-12-20 | 2013-12-16 | 반도체 장치 |
CN201310705960.3A CN103887305B (zh) | 2012-12-20 | 2013-12-19 | 半导体装置 |
US14/134,438 US9337077B2 (en) | 2012-12-20 | 2013-12-19 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012278560A JP6085166B2 (ja) | 2012-12-20 | 2012-12-20 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014123632A JP2014123632A (ja) | 2014-07-03 |
JP6085166B2 true JP6085166B2 (ja) | 2017-02-22 |
Family
ID=50956129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012278560A Expired - Fee Related JP6085166B2 (ja) | 2012-12-20 | 2012-12-20 | 半導体装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9337077B2 (ja) |
JP (1) | JP6085166B2 (ja) |
KR (1) | KR102145169B1 (ja) |
CN (1) | CN103887305B (ja) |
TW (1) | TWI595625B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109545841A (zh) * | 2018-11-22 | 2019-03-29 | 长江存储科技有限责任公司 | 双保护环及其形成方法 |
US11817447B2 (en) | 2019-12-10 | 2023-11-14 | Samsung Electronics Co., Ltd. | Electrostatic discharge protection element and semiconductor devices including the same |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61280650A (ja) * | 1985-06-05 | 1986-12-11 | Toshiba Corp | 入力回路 |
JPS63208240A (ja) * | 1987-02-25 | 1988-08-29 | Hitachi Ltd | 半導体集積回路装置 |
DE3935538A1 (de) * | 1989-10-25 | 1991-05-02 | Thomson Brandt Gmbh | Mos-logik in bicmos-schaltkreisen |
JPH03295268A (ja) * | 1990-04-13 | 1991-12-26 | Sony Corp | 半導体装置 |
CN1245758A (zh) * | 1998-08-20 | 2000-03-01 | 司福佳 | 一种将文字直接设计成花朵的工艺方法 |
CN1157789C (zh) * | 2001-04-11 | 2004-07-14 | 华邦电子股份有限公司 | 静电放电缓冲装置 |
JP4892143B2 (ja) * | 2001-07-13 | 2012-03-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US6788507B2 (en) * | 2002-03-17 | 2004-09-07 | United Microelectronics Corp. | Electrostatic discharge protection circuit |
JP4613720B2 (ja) | 2005-07-08 | 2011-01-19 | 株式会社デンソー | 半導体装置 |
US7737526B2 (en) * | 2007-03-28 | 2010-06-15 | Advanced Analogic Technologies, Inc. | Isolated trench MOSFET in epi-less semiconductor sustrate |
JP2010109172A (ja) * | 2008-10-30 | 2010-05-13 | Elpida Memory Inc | 半導体装置 |
JP5593160B2 (ja) * | 2010-08-13 | 2014-09-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8586423B2 (en) * | 2011-06-24 | 2013-11-19 | International Business Machines Corporation | Silicon controlled rectifier with stress-enhanced adjustable trigger voltage |
-
2012
- 2012-12-20 JP JP2012278560A patent/JP6085166B2/ja not_active Expired - Fee Related
-
2013
- 2013-12-12 TW TW102145872A patent/TWI595625B/zh not_active IP Right Cessation
- 2013-12-16 KR KR1020130156173A patent/KR102145169B1/ko active IP Right Grant
- 2013-12-19 US US14/134,438 patent/US9337077B2/en not_active Expired - Fee Related
- 2013-12-19 CN CN201310705960.3A patent/CN103887305B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
KR20140080420A (ko) | 2014-06-30 |
KR102145169B1 (ko) | 2020-08-18 |
JP2014123632A (ja) | 2014-07-03 |
TWI595625B (zh) | 2017-08-11 |
TW201432876A (zh) | 2014-08-16 |
CN103887305B (zh) | 2018-02-09 |
US9337077B2 (en) | 2016-05-10 |
US20140175552A1 (en) | 2014-06-26 |
CN103887305A (zh) | 2014-06-25 |
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