JP6080075B2 - SiC基板の表面処理方法 - Google Patents
SiC基板の表面処理方法 Download PDFInfo
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Description
11 高温真空炉
70 基板
71 エピタキシャル層
114 蓋部
Claims (10)
- 少なくとも表面がSiCの(0001)Si面又は(000−1)C面で構成されるとともにオフ角を有する基板の表面処理方法において、
前記基板に機械研磨や化学機械研磨を行うことで、表面に研磨傷が生じるとともに当該研磨傷の更に内部側にも変質層が生じており、当該基板をSi蒸気圧下で加熱して前記基板の表面から少なくとも10μmを除去することで、前記研磨傷及び前記変質層を除去する第1除去工程を行うことを特徴とするSiC基板の表面処理方法。 - 請求項1に記載のSiC基板の表面処理方法であって、
前記第1除去工程では、温度範囲が1800℃以上2200℃以下であって、Siの圧力が10-2Pa以上で加熱することで、前記基板の表面から少なくとも10μmを除去することを特徴とするSiC基板の表面処理方法。 - 請求項1又は2に記載のSiC基板の表面処理方法であって、
化学気相蒸着法を用いて前記基板の表面に形成されたエピタキシャル層に生じたマクロステップバンチングを、当該基板をSi蒸気圧下で加熱することで除去する第2除去工程を行うことを特徴とするSiC基板の表面処理方法。 - 請求項3に記載のSiC基板の表面処理方法であって、
前記第2除去工程は、前記第1除去工程よりもエッチング速度が遅いことを特徴とするSiC基板の表面処理方法。 - 請求項3又は4に記載のSiC基板の表面処理方法であって、
前記第2除去工程では、温度範囲が1600℃以上2000℃以下であって、Siの圧力が10-3Pa以下で加熱することを特徴とするSiC基板の表面処理方法。 - 請求項3又は4に記載のSiC基板の表面処理方法であって、
前記第1除去工程では温度範囲が2000℃以上2200℃以下であって、前記第2除去工程では温度範囲が1600℃以上2300℃以下の加熱条件で加熱を行うことを特徴とするSiC基板の表面処理方法。 - 請求項6に記載のSiC基板の表面処理方法であって、
前記第1除去工程及び前記第2除去工程では、<11−20>方向又は<1−100>方向のオフ角が4度以下の表面を有する前記基板に対して、前記加熱条件で加熱を行うことを特徴とするSiC基板の表面処理方法。 - 請求項1から5までの何れか一項に記載のSiC基板の表面処理方法であって、
前記基板の表面は、<11−20>方向のオフ角が4度以下の面であることを特徴とするSiC基板の表面処理方法。 - 請求項1から5までの何れか一項に記載のSiC基板の表面処理方法であって、
前記基板の表面は、<1−100>方向のオフ角が4度以下の面であることを特徴とするSiC基板の表面処理方法。 - 請求項1から9までの何れか一項に記載のSiC基板の表面処理方法であって、
前記基板の表面が、SiC分子の積層方向の1周期分であるフルユニットの高さ又は半周期分であるハーフユニットの高さからなるステップで終端していることを特徴とするSiC基板の表面処理方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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JP2013125020A JP6080075B2 (ja) | 2013-06-13 | 2013-06-13 | SiC基板の表面処理方法 |
PCT/JP2014/003049 WO2014199615A1 (ja) | 2013-06-13 | 2014-06-06 | SiC基板の表面処理方法 |
US14/897,342 US9978597B2 (en) | 2013-06-13 | 2014-06-06 | Method for treating the surface of a silicon-carbide substrate including a removal step in which a modified layer produced by polishing is removed by heating under Si vapor pressure |
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JP2013125020A JP6080075B2 (ja) | 2013-06-13 | 2013-06-13 | SiC基板の表面処理方法 |
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JP6080075B2 true JP6080075B2 (ja) | 2017-02-15 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6232329B2 (ja) * | 2014-03-31 | 2017-11-15 | 東洋炭素株式会社 | SiC種結晶の加工変質層の除去方法、SiC種結晶及びSiC基板の製造方法 |
KR101793397B1 (ko) * | 2014-03-31 | 2017-11-02 | 토요 탄소 가부시키가이샤 | SiC 기판의 표면 처리 방법, SiC 기판의 제조방법, 및 반도체의 제조 방법 |
EP3223303B1 (en) * | 2014-11-18 | 2023-03-15 | Toyo Tanso Co., Ltd. | Etching method for sic substrate and use of holding container |
JP2017105697A (ja) * | 2015-11-26 | 2017-06-15 | 東洋炭素株式会社 | 薄型のSiCウエハの製造方法及び薄型のSiCウエハ |
CN109071231B (zh) * | 2016-04-27 | 2022-07-26 | 学校法人关西学院 | 带有石墨烯前驱体的SiC基板的制备方法和SiC基板的表面处理方法 |
US11261539B2 (en) | 2017-03-22 | 2022-03-01 | Toyo Tanso Co., Ltd. | Method for manufacturing reformed sic wafer, epitaxial layer-attached sic wafer, method for manufacturing same, and surface treatment method |
EP3854916A4 (en) * | 2018-09-21 | 2022-06-22 | Toyo Tanso Co., Ltd. | PROCESS FOR MANUFACTURING A WAFER FOR FABRICATION OF DEVICES |
WO2020095872A1 (ja) * | 2018-11-05 | 2020-05-14 | 学校法人関西学院 | SiC半導体基板及びその製造方法及びその製造装置 |
CN111640661B (zh) * | 2019-03-01 | 2024-01-30 | 东京毅力科创株式会社 | 基板处理方法、基板处理装置以及存储介质 |
US20220181149A1 (en) * | 2019-03-05 | 2022-06-09 | Kwansei Gakuin Educational Foundation | METHOD AND DEVICE FOR MANUFACTURING SiC SUBSTRATE, AND METHOD FOR REDUCING MACRO-STEP BUNCHING OF SiC SUBSTRATE |
JPWO2020203516A1 (ja) * | 2019-03-29 | 2020-10-08 | ||
WO2021025084A1 (ja) * | 2019-08-06 | 2021-02-11 | 学校法人関西学院 | SiC種結晶及びその製造方法、当該SiC種結晶を成長させたSiCインゴット及びその製造方法、並びに、当該SiCインゴットより製造されるSiCウェハ、エピタキシャル膜付きSiCウェハ及びこれらの製造方法 |
EP4036281A4 (en) * | 2019-09-27 | 2023-08-02 | Kwansei Gakuin Educational Foundation | SIC MONOCRYSTAL MANUFACTURING METHOD, SIC MONOCRYSTAL MANUFACTURING DEVICE, AND SIC MONOCRYSTAL SLICE |
CN114424322A (zh) * | 2019-09-27 | 2022-04-29 | 学校法人关西学院 | SiC衬底的制造方法 |
EP3943644A1 (en) * | 2020-07-21 | 2022-01-26 | SiCrystal GmbH | Sic crystals with an optimal orientation of lattice planes for fissure reduction and method of producing same |
EP3943645A1 (en) * | 2020-07-21 | 2022-01-26 | SiCrystal GmbH | Sic crystalline substrates with an optimal orientation of lattice planes for fissure reduction and method of producing same |
EP4056739B1 (en) * | 2021-03-11 | 2023-12-27 | Kiselkarbid i Stockholm AB | Method of growing high-quality single crystal silicon carbide |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3593195B2 (ja) * | 1995-12-28 | 2004-11-24 | 新日本製鐵株式会社 | SiC単結晶基板の製造方法 |
TW565630B (en) * | 1999-09-07 | 2003-12-11 | Sixon Inc | SiC wafer, SiC semiconductor device and method for manufacturing SiC wafer |
JP3761546B2 (ja) * | 2003-08-19 | 2006-03-29 | 株式会社Neomax | SiC単結晶基板の製造方法 |
US7300519B2 (en) * | 2004-11-17 | 2007-11-27 | Cree, Inc. | Reduction of subsurface damage in the production of bulk SiC crystals |
JP5152887B2 (ja) * | 2006-07-07 | 2013-02-27 | 学校法人関西学院 | 単結晶炭化ケイ素基板の表面改質方法、単結晶炭化ケイ素薄膜の形成方法、イオン注入アニール方法及び単結晶炭化ケイ素基板、単結晶炭化ケイ素半導体基板 |
JP2010052997A (ja) * | 2008-08-29 | 2010-03-11 | Bridgestone Corp | 炭化ケイ素単結晶成長用種結晶の製造方法及び炭化ケイ素単結晶の製造方法 |
JP5516424B2 (ja) * | 2009-02-04 | 2014-06-11 | 日立金属株式会社 | エピタキシャル成長用炭化珪素単結晶基板の製造方法 |
JP5564682B2 (ja) * | 2010-04-28 | 2014-07-30 | 学校法人関西学院 | 半導体素子の製造方法 |
JP5678721B2 (ja) | 2011-02-28 | 2015-03-04 | 新日鐵住金株式会社 | 炭化珪素単結晶育成用種結晶及び炭化珪素単結晶の製造方法 |
JP2012193055A (ja) | 2011-03-15 | 2012-10-11 | Toyota Motor Corp | SiC単結晶製造方法およびそれに用いる装置 |
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