JP5971886B2 - ボール・バンプ結合リボン・ワイヤ配線及び集積回路を基板に接続する方法 - Google Patents
ボール・バンプ結合リボン・ワイヤ配線及び集積回路を基板に接続する方法 Download PDFInfo
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- JP5971886B2 JP5971886B2 JP2009120357A JP2009120357A JP5971886B2 JP 5971886 B2 JP5971886 B2 JP 5971886B2 JP 2009120357 A JP2009120357 A JP 2009120357A JP 2009120357 A JP2009120357 A JP 2009120357A JP 5971886 B2 JP5971886 B2 JP 5971886B2
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Description
12 集積回路
16 ボール・バンプ(突起電極)
18 リボン・ワイヤ配線
20 基板
22 金属化面(metallized surface)
24 ボール・バンプ接合
26 表面接合
100 ボール・バンプ結合リボン・ワイヤ配線(他の実施例)
112 第1集積回路
116 ボール・バンプ(突起電極)
118 リボン・ワイヤ配線
120 基板
122 金属化面(metallized surface)
124 ボール・バンプ接合
126 表面接合
128 第1基板
130 第2集積回路
132 第2基板
Claims (3)
- 上面に結合パッドを含み,基板上に設けられた集積回路と,
上記基板が有する上記結合パッド以外の第2電気コンタクトと,
所定バンプ幅を有し,上記結合パッドに取り付けられるボール・バンプと,
実質的に一定で,上記バンプ幅より広いリボン幅を有するリボン・ワイヤとを具え,
上記リボン・ワイヤの第1部分は上記ボール・バンプによって,上記リボン幅より幅が狭い上記結合パッドと電気的に接続されると共に,上記リボン・ワイヤの第2部分が上記リボン幅以上の広さの幅を有する上記第2電気コンタクトに取り付けられ,高周波数信号の損失を低減することを特徴とするボール・バンプ結合リボン・ワイヤ配線。 - 第1結合パッドを含む上面を有する,基板上に設けられた第1集積回路と,
所定バンプ幅を有し,上記第1集積回路の上記第1結合パッドに取り付けられる第1ボール・バンプと,
所定リボン幅を有すると共に,対向する端部及び中間部分を有するリボンワイヤであって,上記対向する端部の一方が上記第1ボール・バンプによって,上記リボン幅より幅の狭い上記第1結合パッドと電気的に接続される上記リボンワイヤと,
第2結合パッドを含む上面を有する,上記基板上に設けられた第2集積回路と,
所定バンプ幅を有し,上記第2集積回路の上記第2結合パッドに取り付けられる第2ボール・バンプと,
上記基板が有する上記第1及び第2結合パッド以外の電気コンタクトである金属化面とを具え,
上記所定リボン幅は,実質的に一定で,上記第1及び第2ボール・バンプの上記バンプ幅よりも広く,上記リボン・ワイヤの上記中間部分が上記第2集積回路の上記第2ボール・バンプによって,上記リボン幅より幅が狭い上記第2結合パッドと電気的に接続され,上記リボン・ワイヤの上記対向する端部の他方が上記リボン幅以上の広さの幅を有する上記金属化面に取り付けられ,高周波数信号の損失を低減することを特徴とするボール・バンプ結合リボン・ワイヤ配線。 - 実質的に一定の所定リボン幅を有すると共に自由端及び第2部分を有するリボン・ワイヤと,金属化面部分を有する基板と,結合パッドを含む上面を有し,上記基板上に設けられた集積回路とを用意するステップと,
ボール・バンプを上記結合パッドに取り付けるステップと,
上記ボール・バンプよりも幅の広い上記リボン・ワイヤの上記自由端をサーモソニック処理によって上記ボール・バンプに溶接することにより,上記リボン幅より幅の狭い上記結合パッドと上記リボン・ワイヤとを電気的に接続するステップと,
上記リボン・ワイヤの上記第2部分を上記リボン幅以上の広さの幅を有する上記金属化面部分に取り付けるステップと
を具え,高周波数信号の損失を低減することを特徴とする集積回路を基板に接続する方法。
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US12/122,213 US7977804B2 (en) | 2008-05-16 | 2008-05-16 | Ball-bump bonded ribbon-wire interconnect |
US12/122,213 | 2008-05-16 |
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JP2009278116A JP2009278116A (ja) | 2009-11-26 |
JP5971886B2 true JP5971886B2 (ja) | 2016-08-17 |
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EP (1) | EP2120259A1 (ja) |
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JPS61116850A (ja) * | 1984-11-12 | 1986-06-04 | Mitsubishi Electric Corp | 半導体装置 |
US5976964A (en) * | 1997-04-22 | 1999-11-02 | Micron Technology, Inc. | Method of improving interconnect of semiconductor device by utilizing a flattened ball bond |
JP2001237263A (ja) | 2000-02-24 | 2001-08-31 | Hitachi Ltd | 高周波回路装置及びその製造方法 |
US6500760B1 (en) * | 2001-08-02 | 2002-12-31 | Sandia Corporation | Gold-based electrical interconnections for microelectronic devices |
JP3865055B2 (ja) * | 2001-12-28 | 2007-01-10 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP2003303845A (ja) | 2002-04-10 | 2003-10-24 | Fuji Electric Co Ltd | 半導体装置およびワイヤボンディング方法 |
DE10223035A1 (de) | 2002-05-22 | 2003-12-04 | Infineon Technologies Ag | Elektronisches Bauteil mit Hohlraumgehäuse, insbesondere Hochfrequenz-Leistungsmodul |
JP4265394B2 (ja) * | 2003-12-17 | 2009-05-20 | 株式会社日立製作所 | 電力変換装置 |
JP2005259915A (ja) | 2004-03-10 | 2005-09-22 | Nec Electronics Corp | 半導体装置およびその製造方法 |
KR100604840B1 (ko) * | 2004-03-11 | 2006-07-28 | 삼성전자주식회사 | 미세 피치 범프에의 리버스 와이어 본딩 방법 및 이에의한 와이어 본드 구조체 |
US8105932B2 (en) | 2004-08-19 | 2012-01-31 | Infineon Technologies Ag | Mixed wire semiconductor lead frame package |
JP4722757B2 (ja) * | 2006-04-19 | 2011-07-13 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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- 2009-05-14 EP EP09251320A patent/EP2120259A1/en not_active Withdrawn
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JP2009278116A (ja) | 2009-11-26 |
US7977804B2 (en) | 2011-07-12 |
US20090283920A1 (en) | 2009-11-19 |
CN101582398B (zh) | 2013-06-19 |
EP2120259A1 (en) | 2009-11-18 |
CN101582398A (zh) | 2009-11-18 |
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