JP5844101B2 - 発光装置用の配線基板、発光装置及び発光装置用配線基板の製造方法 - Google Patents
発光装置用の配線基板、発光装置及び発光装置用配線基板の製造方法 Download PDFInfo
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- JP5844101B2 JP5844101B2 JP2011202126A JP2011202126A JP5844101B2 JP 5844101 B2 JP5844101 B2 JP 5844101B2 JP 2011202126 A JP2011202126 A JP 2011202126A JP 2011202126 A JP2011202126 A JP 2011202126A JP 5844101 B2 JP5844101 B2 JP 5844101B2
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- Japan
- Prior art keywords
- plating layer
- layer
- wiring pattern
- plating
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Led Device Packages (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011202126A JP5844101B2 (ja) | 2011-09-15 | 2011-09-15 | 発光装置用の配線基板、発光装置及び発光装置用配線基板の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011202126A JP5844101B2 (ja) | 2011-09-15 | 2011-09-15 | 発光装置用の配線基板、発光装置及び発光装置用配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013065621A JP2013065621A (ja) | 2013-04-11 |
| JP2013065621A5 JP2013065621A5 (enExample) | 2014-09-11 |
| JP5844101B2 true JP5844101B2 (ja) | 2016-01-13 |
Family
ID=48188892
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011202126A Active JP5844101B2 (ja) | 2011-09-15 | 2011-09-15 | 発光装置用の配線基板、発光装置及び発光装置用配線基板の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5844101B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6266907B2 (ja) * | 2013-07-03 | 2018-01-24 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| KR102148845B1 (ko) * | 2013-12-12 | 2020-08-27 | 엘지이노텍 주식회사 | 인쇄회로기판 |
| KR20150074421A (ko) * | 2013-12-24 | 2015-07-02 | 엘지이노텍 주식회사 | 인쇄회로기판 및 이를 포함하는 발광 장치 |
| JP6316731B2 (ja) | 2014-01-14 | 2018-04-25 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体パッケージ |
| EP3142159B1 (en) * | 2014-05-09 | 2018-10-24 | Kyocera Corporation | Substrate for mounting light-emitting element, and light-emitting device |
| JP2016051797A (ja) * | 2014-08-29 | 2016-04-11 | 大日本印刷株式会社 | 積層体、積層体を用いた配線基板の製造方法、配線基板、および配線基板を備える実装基板の製造方法 |
| JP6555907B2 (ja) | 2015-03-16 | 2019-08-07 | アルパッド株式会社 | 半導体発光装置 |
| CN108476611B (zh) * | 2016-01-08 | 2021-02-19 | 利罗特瑞公司 | 印刷电路表面抛光、使用方法和由此制成的组件 |
| JP6924642B2 (ja) * | 2017-07-19 | 2021-08-25 | スタンレー電気株式会社 | 半導体発光素子アレイ、及び、半導体発光装置 |
| JP2021092629A (ja) * | 2019-12-09 | 2021-06-17 | フコクインダストリー株式会社 | 表示装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5559795A (en) * | 1978-10-30 | 1980-05-06 | Nippon Electric Co | Printed circuit board and method of manufacturing same |
| SG102588A1 (en) * | 2000-08-03 | 2004-03-26 | Inst Materials Research & Eng | A process for modifying chip assembly substrates |
| JP2004055624A (ja) * | 2002-07-16 | 2004-02-19 | Murata Mfg Co Ltd | 基板の製造方法 |
| JP4674120B2 (ja) * | 2005-06-06 | 2011-04-20 | 京セラSlcテクノロジー株式会社 | 配線基板およびその製造方法 |
| JP2010182865A (ja) * | 2009-02-05 | 2010-08-19 | Nitto Denko Corp | 配線回路基板の製造方法 |
| KR20120068831A (ko) * | 2009-07-17 | 2012-06-27 | 덴끼 가가꾸 고교 가부시키가이샤 | Led 칩 접합체, led 패키지, 및 led 패키지의 제조 방법 |
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2011
- 2011-09-15 JP JP2011202126A patent/JP5844101B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2013065621A (ja) | 2013-04-11 |
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