JP5717763B2 - 非対称n型電界効果トランジスタおよびこれを形成するための方法 - Google Patents

非対称n型電界効果トランジスタおよびこれを形成するための方法 Download PDF

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Publication number
JP5717763B2
JP5717763B2 JP2012548085A JP2012548085A JP5717763B2 JP 5717763 B2 JP5717763 B2 JP 5717763B2 JP 2012548085 A JP2012548085 A JP 2012548085A JP 2012548085 A JP2012548085 A JP 2012548085A JP 5717763 B2 JP5717763 B2 JP 5717763B2
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Prior art keywords
implant
source
asymmetric
drain
channel
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Expired - Fee Related
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Japanese (ja)
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JP2013516793A (ja
JP2013516793A5 (https=
Inventor
チャン、ジョセフィン、ビー
チャン、レランド
リン、チャン、スン
スレイト、ジェフリー、ダブリュ
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International Business Machines Corp
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International Business Machines Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H10D30/6711Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect by using electrodes contacting the supplementary regions or layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2012548085A 2010-01-07 2011-01-05 非対称n型電界効果トランジスタおよびこれを形成するための方法 Expired - Fee Related JP5717763B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/683,634 2010-01-07
US12/683,634 US8643107B2 (en) 2010-01-07 2010-01-07 Body-tied asymmetric N-type field effect transistor
PCT/US2011/020173 WO2011084975A2 (en) 2010-01-07 2011-01-05 A body-tied asymmetric n-type field effect transistor

Publications (3)

Publication Number Publication Date
JP2013516793A JP2013516793A (ja) 2013-05-13
JP2013516793A5 JP2013516793A5 (https=) 2014-08-14
JP5717763B2 true JP5717763B2 (ja) 2015-05-13

Family

ID=44224203

Family Applications (1)

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JP2012548085A Expired - Fee Related JP5717763B2 (ja) 2010-01-07 2011-01-05 非対称n型電界効果トランジスタおよびこれを形成するための方法

Country Status (5)

Country Link
US (1) US8643107B2 (https=)
EP (1) EP2522032A4 (https=)
JP (1) JP5717763B2 (https=)
CN (1) CN102714222B (https=)
WO (1) WO2011084975A2 (https=)

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US8674422B2 (en) * 2012-01-30 2014-03-18 Synopsys, Inc. Asymmetric dense floating gate nonvolatile memory with decoupled capacitor
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US8822278B2 (en) * 2012-03-29 2014-09-02 International Business Machines Corporation Asymmetric FET formed through use of variable pitch gate for use as logic device and test structure
US9842858B2 (en) 2015-11-18 2017-12-12 Peregrine Semiconductor Corporation Butted body contact for SOI transistor
US9837965B1 (en) 2016-09-16 2017-12-05 Peregrine Semiconductor Corporation Standby voltage condition for fast RF amplifier bias recovery
US9960737B1 (en) 2017-03-06 2018-05-01 Psemi Corporation Stacked PA power control
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Also Published As

Publication number Publication date
EP2522032A2 (en) 2012-11-14
CN102714222A (zh) 2012-10-03
WO2011084975A3 (en) 2011-12-29
JP2013516793A (ja) 2013-05-13
WO2011084975A2 (en) 2011-07-14
US20110163380A1 (en) 2011-07-07
US8643107B2 (en) 2014-02-04
CN102714222B (zh) 2016-01-27
EP2522032A4 (en) 2014-05-28

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