JP5667767B2 - Ｓｏｉ基板の作製方法 - Google Patents

Ｓｏｉ基板の作製方法 Download PDF

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Publication number
JP5667767B2
JP5667767B2 JP2010008680A JP2010008680A JP5667767B2 JP 5667767 B2 JP5667767 B2 JP 5667767B2 JP 2010008680 A JP2010008680 A JP 2010008680A JP 2010008680 A JP2010008680 A JP 2010008680A JP 5667767 B2 JP5667767 B2 JP 5667767B2
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JP
Japan
Prior art keywords
single crystal
substrate
crystal semiconductor
semiconductor layer
etching
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Expired - Fee Related
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JP2010008680A
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English (en)
Japanese (ja)
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JP2010192884A5 (enExample
JP2010192884A (ja
Inventor
耕生 野田
耕生 野田
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2010008680A priority Critical patent/JP5667767B2/ja
Publication of JP2010192884A publication Critical patent/JP2010192884A/ja
Publication of JP2010192884A5 publication Critical patent/JP2010192884A5/ja
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Classifications

    • H10P90/1916—
    • H10W10/181—

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2010008680A 2009-01-21 2010-01-19 Ｓｏｉ基板の作製方法 Expired - Fee Related JP5667767B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010008680A JP5667767B2 (ja) 2009-01-21 2010-01-19 Ｓｏｉ基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009011425 2009-01-21
JP2009011425 2009-01-21
JP2010008680A JP5667767B2 (ja) 2009-01-21 2010-01-19 Ｓｏｉ基板の作製方法

Publications (3)

Publication Number Publication Date
JP2010192884A JP2010192884A (ja) 2010-09-02
JP2010192884A5 JP2010192884A5 (enExample) 2013-03-07
JP5667767B2 true JP5667767B2 (ja) 2015-02-12

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ID=42337296

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JP2010008680A Expired - Fee Related JP5667767B2 (ja) 2009-01-21 2010-01-19 Ｓｏｉ基板の作製方法

Country Status (4)

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US (2) US8053332B2 (enExample)
JP (1) JP5667767B2 (enExample)
KR (1) KR101661705B1 (enExample)
SG (2) SG163481A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG193904A1 (en) 2011-04-11 2013-11-29 Ev Group E Thallner Gmbh Flexible carrier mount, device and method for detaching a carrier substrate
FR2978604B1 (fr) 2011-07-28 2018-09-14 Soitec Procede de guerison de defauts dans une couche semi-conductrice
JP5797504B2 (ja) * 2011-09-16 2015-10-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR20140113908A (ko) 2011-12-22 2014-09-25 에베 그룹 에. 탈너 게엠베하 가요성 기판 홀더, 제1 기판을 분리하기 위한 장치 및 방법
US8842358B2 (en) 2012-08-01 2014-09-23 Gentex Corporation Apparatus, method, and process with laser induced channel edge
US9029809B2 (en) * 2012-11-30 2015-05-12 Ultratech, Inc. Movable microchamber system with gas curtain
CN115668454A (zh) * 2020-05-29 2023-01-31 株式会社国际电气 半导体器件的制造方法、衬底处理方法、衬底处理装置及程序

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0254532A (ja) * 1988-08-17 1990-02-23 Sony Corp Ｓｏｉ基板の製造方法
US5166097A (en) * 1990-11-26 1992-11-24 The Boeing Company Silicon wafers containing conductive feedthroughs
JP3649797B2 (ja) * 1995-12-01 2005-05-18 株式会社半導体エネルギー研究所 半導体装置製造方法
JP3324469B2 (ja) 1997-09-26 2002-09-17 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US5968847A (en) * 1998-03-13 1999-10-19 Applied Materials, Inc. Process for copper etch back
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
US6423644B1 (en) * 2000-07-12 2002-07-23 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
KR100567885B1 (ko) * 2003-12-30 2006-04-04 동부아남반도체 주식회사 반도체 소자의 실리사이드막 제조 방법
JP5110772B2 (ja) * 2004-02-03 2012-12-26 株式会社半導体エネルギー研究所 半導体薄膜層を有する基板の製造方法
JP2005251912A (ja) * 2004-03-03 2005-09-15 Seiko Epson Corp 複合半導体基板の製造方法、複合半導体基板、電気光学装置および電子機器
JP5127176B2 (ja) * 2005-07-29 2013-01-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN101281912B (zh) * 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
KR101400699B1 (ko) * 2007-05-18 2014-05-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판 및 반도체 장치 및 그 제조 방법
JP5415676B2 (ja) * 2007-05-30 2014-02-12 信越化学工業株式会社 Ｓｏｉウェーハの製造方法
KR101495153B1 (ko) * 2007-06-01 2015-02-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 제작 방법 및 반도체장치
JP5527956B2 (ja) * 2007-10-10 2014-06-25 株式会社半導体エネルギー研究所 半導体基板の製造方法
US8101501B2 (en) * 2007-10-10 2012-01-24 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP2009135448A (ja) * 2007-11-01 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法及び半導体装置の作製方法
US8093136B2 (en) * 2007-12-28 2012-01-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate

Also Published As

Publication number Publication date
US20120077330A1 (en) 2012-03-29
SG178765A1 (en) 2012-03-29
US8338270B2 (en) 2012-12-25
US20100184269A1 (en) 2010-07-22
KR101661705B1 (ko) 2016-09-30
SG163481A1 (en) 2010-08-30
KR20100085840A (ko) 2010-07-29
JP2010192884A (ja) 2010-09-02
US8053332B2 (en) 2011-11-08

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