KR101661705B1 - Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법 - Google Patents

Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법 Download PDF

Info

Publication number
KR101661705B1
KR101661705B1 KR1020100000892A KR20100000892A KR101661705B1 KR 101661705 B1 KR101661705 B1 KR 101661705B1 KR 1020100000892 A KR1020100000892 A KR 1020100000892A KR 20100000892 A KR20100000892 A KR 20100000892A KR 101661705 B1 KR101661705 B1 KR 101661705B1
Authority
KR
South Korea
Prior art keywords
single crystal
substrate
crystal semiconductor
semiconductor layer
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020100000892A
Other languages
English (en)
Korean (ko)
Other versions
KR20100085840A (ko
Inventor
코세이 노다
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 가부시키가이샤 한도오따이 에네루기 켄큐쇼
Publication of KR20100085840A publication Critical patent/KR20100085840A/ko
Application granted granted Critical
Publication of KR101661705B1 publication Critical patent/KR101661705B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020100000892A 2009-01-21 2010-01-06 Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법 Expired - Fee Related KR101661705B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009011425 2009-01-21
JPJP-P-2009-011425 2009-01-21

Publications (2)

Publication Number Publication Date
KR20100085840A KR20100085840A (ko) 2010-07-29
KR101661705B1 true KR101661705B1 (ko) 2016-09-30

Family

ID=42337296

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100000892A Expired - Fee Related KR101661705B1 (ko) 2009-01-21 2010-01-06 Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법

Country Status (4)

Country Link
US (2) US8053332B2 (enExample)
JP (1) JP5667767B2 (enExample)
KR (1) KR101661705B1 (enExample)
SG (2) SG178765A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170078858A (ko) 2011-04-11 2017-07-07 에베 그룹 에. 탈너 게엠베하 가요성의 캐리어 마운트 및 캐리어 기판을 분리하기 위한 장치 및 방법
FR2978604B1 (fr) * 2011-07-28 2018-09-14 Soitec Procede de guerison de defauts dans une couche semi-conductrice
JP5797504B2 (ja) * 2011-09-16 2015-10-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR102249658B1 (ko) 2011-12-22 2021-05-10 에베 그룹 에. 탈너 게엠베하 가요성 기판 홀더, 제1 기판을 분리하기 위한 장치 및 방법
WO2014022681A1 (en) 2012-08-01 2014-02-06 Gentex Corporation Assembly with laser induced channel edge and method thereof
US9029809B2 (en) * 2012-11-30 2015-05-12 Ultratech, Inc. Movable microchamber system with gas curtain
JP7361911B2 (ja) * 2020-05-29 2023-10-16 株式会社Kokusai Electric 基板処理方法、半導体装置の製造方法、基板処理装置、およびプログラム

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005252244A (ja) * 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法
JP2005251912A (ja) * 2004-03-03 2005-09-15 Seiko Epson Corp 複合半導体基板の製造方法、複合半導体基板、電気光学装置および電子機器
JP2009010353A (ja) * 2007-06-01 2009-01-15 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法及び半導体装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0254532A (ja) * 1988-08-17 1990-02-23 Sony Corp Ｓｏｉ基板の製造方法
US5166097A (en) * 1990-11-26 1992-11-24 The Boeing Company Silicon wafers containing conductive feedthroughs
JP3649797B2 (ja) * 1995-12-01 2005-05-18 株式会社半導体エネルギー研究所 半導体装置製造方法
JP3324469B2 (ja) 1997-09-26 2002-09-17 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US5968847A (en) * 1998-03-13 1999-10-19 Applied Materials, Inc. Process for copper etch back
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
US6423644B1 (en) * 2000-07-12 2002-07-23 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
KR100567885B1 (ko) * 2003-12-30 2006-04-04 동부아남반도체 주식회사 반도체 소자의 실리사이드막 제조 방법
JP5127176B2 (ja) * 2005-07-29 2013-01-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN101281912B (zh) * 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
KR101400699B1 (ko) * 2007-05-18 2014-05-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판 및 반도체 장치 및 그 제조 방법
JP5415676B2 (ja) * 2007-05-30 2014-02-12 信越化学工業株式会社 Ｓｏｉウェーハの製造方法
US8101501B2 (en) * 2007-10-10 2012-01-24 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP5527956B2 (ja) * 2007-10-10 2014-06-25 株式会社半導体エネルギー研究所 半導体基板の製造方法
JP2009135448A (ja) * 2007-11-01 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法及び半導体装置の作製方法
US8093136B2 (en) * 2007-12-28 2012-01-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005252244A (ja) * 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法
JP2005251912A (ja) * 2004-03-03 2005-09-15 Seiko Epson Corp 複合半導体基板の製造方法、複合半導体基板、電気光学装置および電子機器
JP2009010353A (ja) * 2007-06-01 2009-01-15 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法及び半導体装置

Also Published As

Publication number Publication date
US8053332B2 (en) 2011-11-08
KR20100085840A (ko) 2010-07-29
US20120077330A1 (en) 2012-03-29
SG178765A1 (en) 2012-03-29
US20100184269A1 (en) 2010-07-22
JP5667767B2 (ja) 2015-02-12
JP2010192884A (ja) 2010-09-02
SG163481A1 (en) 2010-08-30
US8338270B2 (en) 2012-12-25

Similar Documents

Publication Publication Date Title
KR101484490B1 (ko) Ｓｏｉ 기판의 제조 방법
KR101574138B1 (ko) Ｓｏｉ 기판의 제조방법
KR101596454B1 (ko) Ｓｏｉ 기판의 제작 방법
JP5486828B2 (ja) 半導体基板の作製方法
TWI483295B (zh) 絕緣體上矽基板及其製造方法
KR101629193B1 (ko) Ｓｏｉ 기판의 제작 방법
US8247307B2 (en) Manufacturing method of substrate provided with semiconductor films
KR101661705B1 (ko) Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법
JP5478166B2 (ja) 半導体装置の作製方法
KR101691387B1 (ko) Ｓｏｉ 기판의 제작 방법 및 반도체 장치의 제작 방법
JP2009260315A (ja) Ｓｏｉ基板の作製方法及び半導体装置の作製方法
KR101576815B1 (ko) 반도체 기판의 제작 방법
KR101630216B1 (ko) 반도체 장치의 제작 방법

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E90F Notification of reason for final refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E90F Notification of reason for final refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20190829

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20210927

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20210927

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000