JP5654033B2 - テンプレート及び基板の処理方法 - Google Patents
テンプレート及び基板の処理方法 Download PDFInfo
- Publication number
- JP5654033B2 JP5654033B2 JP2012538664A JP2012538664A JP5654033B2 JP 5654033 B2 JP5654033 B2 JP 5654033B2 JP 2012538664 A JP2012538664 A JP 2012538664A JP 2012538664 A JP2012538664 A JP 2012538664A JP 5654033 B2 JP5654033 B2 JP 5654033B2
- Authority
- JP
- Japan
- Prior art keywords
- template
- hydrophilic
- wafer
- substrate
- hydrophilic region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims description 47
- 238000003672 processing method Methods 0.000 title claims description 12
- 238000007747 plating Methods 0.000 claims description 106
- 238000012545 processing Methods 0.000 claims description 75
- 239000007788 liquid Substances 0.000 claims description 65
- 238000005530 etching Methods 0.000 claims description 37
- 238000011282 treatment Methods 0.000 claims description 28
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 25
- 230000007246 mechanism Effects 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000004140 cleaning Methods 0.000 claims description 3
- 230000005284 excitation Effects 0.000 claims description 3
- 238000006116 polymerization reaction Methods 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims 1
- 238000000034 method Methods 0.000 description 44
- 230000008569 process Effects 0.000 description 27
- 230000002209 hydrophobic effect Effects 0.000 description 15
- 230000009471 action Effects 0.000 description 11
- 230000000694 effects Effects 0.000 description 11
- 239000010408 film Substances 0.000 description 9
- 230000010354 integration Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000001459 lithography Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 150000004686 pentahydrates Chemical class 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05C—APPARATUS FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05C5/00—Apparatus in which liquid or other fluent material is projected, poured or allowed to flow on to the surface of the work
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/08—Electroplating with moving electrolyte e.g. jet electroplating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D21/00—Processes for servicing or operating cells for electrolytic coating
- C25D21/08—Rinsing
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/20—Electroplating using ultrasonics, vibrations
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Electroplating Methods And Accessories (AREA)
- ing And Chemical Polishing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
10 孔部
11 親水パターン
12 親水膜
20 テンプレート
20a 表面
20b 裏面
20c 溝部
30 開口部
31 流通路
40 第1の親水領域
41 第2の親水領域
42 第3の親水領域
62 移動機構
100 制御部
200 スクライブライン
201 親水パターン
202 親水膜
210 開口部
211 流通路
220 第1の親水領域
221 第2の親水領域
222 第3の親水領域
230 加振機構
E エッチング液
M めっき液
P 純水
W ウェハ
Wa 表面
Wb 裏面
Claims (13)
- 基板の所定位置に処理液を供給する際に用いられるテンプレートであって、
表面において前記所定位置に対応する位置に形成された複数の開口部と、
前記開口部から裏面まで厚み方向に貫通し、前記処理液を流通させるための流通路と、
前記開口部の周囲の表面において親水性を有する第1の親水領域と、
前記流通路の内側面において親水性を有する第2の親水領域と、を有し、
前記第1の親水領域は、前記所定位置の周囲の基板表面において親水性を有する親水パターンに対応する位置に形成されている。 - 請求項1に記載のテンプレートであって、
第3の親水領域が、前記流通路の前記裏面側の開口部の周囲に形成されている。 - 請求項1に記載のテンプレートであって、
前記第2の親水領域は、前記開口部から前記流通路の内側面の途中まで形成されている。 - 請求項1に記載のテンプレートであって、
前記テンプレートと前記基板を重ね合わせた状態で、当該テンプレートを振動させる加振機構が設けられている。 - 請求項1に記載のテンプレートであって、
表面において、前記第1の親水領域が形成されていない領域は、当該第1の親水領域に比して窪んで溝部を形成している。 - 基板の所定位置に処理液を供給して処理する基板の処理方法であって、
表面において前記所定位置に対応する位置に形成された複数の開口部と、前記開口部から裏面まで厚み方向に貫通し、前記処理液を流通させるための流通路と、前記開口部の周囲の表面において親水性を有する第1の親水領域と、前記流通路の内側面において親水性を有する第2の親水領域と、を備えたテンプレートの表面と、前記所定位置の周囲の表面において親水性を有する親水パターンを備えた基板の表面とを、前記第1の親水領域の位置と前記親水パターンの位置が対応するように重ね合せる重合工程と、
前記流通路に前記処理液を供給し、前記第1の親水領域と前記親水パターンとの間に前記処理液を充填する液充填工程と、
前記流通路に供給された処理液を前記基板の所定位置に供給し、前記開口部が前記所定位置に位置するように前記テンプレートと前記基板の位置調整を行うと共に、前記基板の所定位置の処理を行う処理工程と、を有する。 - 請求項6に記載の基板の処理方法であって、
前記重合工程の前に、前記流通路内に前記処理液を充填する。 - 請求項6に記載の基板の処理方法であって、
前記流通路への前記処理液の供給は、前記テンプレートの裏面側から当該処理液を供給することによって行われ、
前記処理工程後、前記テンプレートの裏面に残存する不要処理液を除去する。 - 請求項6に記載の基板の処理方法であって、
前記第2の親水領域は、前記開口部から前記流通路の内側面の途中まで形成されている。 - 請求項6に記載の基板の処理方法であって、
少なくとも前記液充填工程又は前記処理工程において、前記テンプレートを振動させる。 - 請求項6に記載の基板の処理方法であって、
前記処理液は、エッチング液、めっき液、絶縁膜形成用溶液、洗浄液、又は純水である。 - 請求項6に記載の基板の処理方法であって、
前記所定位置は、貫通電極が形成される孔部の位置を含む。 - 請求項12に記載の基板の処理方法であって、
前記所定位置は、半導体チップを形成するためのスクライブラインの位置をさらに含む。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012538664A JP5654033B2 (ja) | 2010-10-13 | 2011-10-07 | テンプレート及び基板の処理方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010230738 | 2010-10-13 | ||
JP2010230738 | 2010-10-13 | ||
JP2012538664A JP5654033B2 (ja) | 2010-10-13 | 2011-10-07 | テンプレート及び基板の処理方法 |
PCT/JP2011/073206 WO2012050057A1 (ja) | 2010-10-13 | 2011-10-07 | テンプレート及び基板の処理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2012050057A1 JPWO2012050057A1 (ja) | 2014-02-24 |
JP5654033B2 true JP5654033B2 (ja) | 2015-01-14 |
Family
ID=45938286
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012538664A Expired - Fee Related JP5654033B2 (ja) | 2010-10-13 | 2011-10-07 | テンプレート及び基板の処理方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20130224951A1 (ja) |
JP (1) | JP5654033B2 (ja) |
KR (1) | KR20130139265A (ja) |
TW (1) | TWI417952B (ja) |
WO (1) | WO2012050057A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013108111A (ja) * | 2011-11-18 | 2013-06-06 | Tokyo Electron Ltd | 基板の処理方法及びテンプレート |
JP2014082291A (ja) * | 2012-10-16 | 2014-05-08 | Tokyo Electron Ltd | 半導体装置の製造方法及び半導体装置 |
JP2014107469A (ja) * | 2012-11-29 | 2014-06-09 | Tokyo Electron Ltd | 半導体装置の製造方法及び製造装置 |
JP6160147B2 (ja) * | 2013-03-19 | 2017-07-12 | Tdk株式会社 | 電子部品モジュールの製造方法、無電解メッキ方法及び無電解メッキ装置 |
JP6198456B2 (ja) * | 2013-05-20 | 2017-09-20 | 東京エレクトロン株式会社 | 基板の処理方法及びテンプレート |
TW202140864A (zh) * | 2020-02-06 | 2021-11-01 | 日商東京威力科創股份有限公司 | 鍍敷處理方法及鍍敷處理裝置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003253485A (ja) * | 2002-02-26 | 2003-09-10 | Seiko Epson Corp | 電気装置の製造方法 |
JP2004006518A (ja) * | 2002-05-31 | 2004-01-08 | Toshiba Corp | エッチング装置 |
JP2008280558A (ja) * | 2007-05-08 | 2008-11-20 | Hiroshima Industrial Promotion Organization | 液体を用いた局所表面処理方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6109728A (en) * | 1995-09-14 | 2000-08-29 | Ricoh Company, Ltd. | Ink jet printing head and its production method |
US6225032B1 (en) * | 1997-08-27 | 2001-05-01 | Canon Kabushiki Kaisha | Method for manufacturing liquid jet recording heads and a head manufactured by such method of manufacture |
US6461136B1 (en) * | 1999-08-26 | 2002-10-08 | International Business Machines Corp. | Apparatus for filling high aspect ratio via holes in electronic substrates |
JP3708005B2 (ja) * | 2000-08-09 | 2005-10-19 | 日本無線株式会社 | プリント配線板の穴埋め方法 |
US6942836B2 (en) * | 2001-10-16 | 2005-09-13 | Applera Corporation | System for filling substrate chambers with liquid |
US7093375B2 (en) * | 2002-09-30 | 2006-08-22 | Lam Research Corporation | Apparatus and method for utilizing a meniscus in substrate processing |
US20050051437A1 (en) * | 2003-09-04 | 2005-03-10 | Keiichi Kurashina | Plating apparatus and plating method |
KR100561864B1 (ko) * | 2004-02-27 | 2006-03-17 | 삼성전자주식회사 | 잉크젯 프린트헤드의 노즐 플레이트 표면에 소수성코팅막을 형성하는 방법 |
KR101407582B1 (ko) * | 2007-12-11 | 2014-06-30 | 삼성디스플레이 주식회사 | 잉크젯 프린트헤드의 노즐 플레이트 및 그 제조 방법 |
JP5350205B2 (ja) * | 2009-12-16 | 2013-11-27 | キヤノン株式会社 | 液体吐出ヘッド用基板及び液体吐出ヘッド、およびその製造方法 |
-
2011
- 2011-10-07 WO PCT/JP2011/073206 patent/WO2012050057A1/ja active Application Filing
- 2011-10-07 JP JP2012538664A patent/JP5654033B2/ja not_active Expired - Fee Related
- 2011-10-07 KR KR1020137009317A patent/KR20130139265A/ko not_active Application Discontinuation
- 2011-10-11 TW TW100136780A patent/TWI417952B/zh not_active IP Right Cessation
-
2013
- 2013-04-12 US US13/861,712 patent/US20130224951A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003253485A (ja) * | 2002-02-26 | 2003-09-10 | Seiko Epson Corp | 電気装置の製造方法 |
JP2004006518A (ja) * | 2002-05-31 | 2004-01-08 | Toshiba Corp | エッチング装置 |
JP2008280558A (ja) * | 2007-05-08 | 2008-11-20 | Hiroshima Industrial Promotion Organization | 液体を用いた局所表面処理方法 |
Also Published As
Publication number | Publication date |
---|---|
TWI417952B (zh) | 2013-12-01 |
WO2012050057A1 (ja) | 2012-04-19 |
TW201232638A (en) | 2012-08-01 |
KR20130139265A (ko) | 2013-12-20 |
JPWO2012050057A1 (ja) | 2014-02-24 |
US20130224951A1 (en) | 2013-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5654033B2 (ja) | テンプレート及び基板の処理方法 | |
TWI550768B (zh) | 半導體裝置及其形成方法 | |
JP6278760B2 (ja) | チップ整列方法 | |
JP2016213253A (ja) | 貫通電極基板並びに貫通電極基板を用いたインターポーザ及び半導体装置 | |
US12019111B2 (en) | Manufacturing method of a multi-layer for a probe card | |
US11901296B2 (en) | Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate | |
TWI655714B (zh) | 封裝基板、封裝半導體裝置與其之封裝方法 | |
JP2008227309A (ja) | 配線基板およびその製造方法 | |
WO2015137442A1 (ja) | 基板処理方法及び基板処理治具 | |
WO2013073339A1 (ja) | 基板の処理方法及びテンプレート | |
KR20130111953A (ko) | 기판의 에칭 방법 및 컴퓨터 기억 매체 | |
JP2014197606A (ja) | 配線基板及びその製造方法 | |
JP2013182972A (ja) | 基板の接合方法及び半導体装置 | |
JP2008085373A (ja) | プリント配線板およびその製造方法 | |
JP6467981B2 (ja) | 半導体装置およびその製造方法 | |
US20220406685A1 (en) | 3d heterogeneously integrated systems with cooling channels in glass | |
US20220406686A1 (en) | Glass-based cavity and channels for cooling of embedded dies and 3d integrated modules using package substrates with glass core | |
JP6458599B2 (ja) | 端子の製造方法 | |
WO2011145440A1 (ja) | 処理液の供給方法及びコンピュータ記憶媒体 | |
JP2019016733A (ja) | 貫通電極基板、貫通電極基板の製造方法及び貫通電極基板を用いた半導体装置 | |
KR20130039080A (ko) | 인쇄회로기판 및 그 제조 방법 | |
TW202439027A (zh) | 選擇性模板遮罩和模板印刷方法 | |
WO2010072246A1 (en) | Method for resist development in narrow high aspect ratio vias | |
JP2008085237A (ja) | 貫通電極付き基板の製造方法、及び貫通電極付き基板 | |
JP2012028672A (ja) | 配線の製造方法、半導体装置の製造方法、3次元半導体集積回路及びその製造方法、並びに配線製造装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140819 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141016 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20141111 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20141119 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5654033 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |