JP5649664B2 - 全nmos−4トランジスタ不揮発性メモリセルのプログラム方法 - Google Patents

全nmos−4トランジスタ不揮発性メモリセルのプログラム方法 Download PDF

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JP5649664B2
JP5649664B2 JP2012551964A JP2012551964A JP5649664B2 JP 5649664 B2 JP5649664 B2 JP 5649664B2 JP 2012551964 A JP2012551964 A JP 2012551964A JP 2012551964 A JP2012551964 A JP 2012551964A JP 5649664 B2 JP5649664 B2 JP 5649664B2
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nmos
transistor
drain
voltage
source
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JP2013519180A5 (enExample
JP2013519180A (ja
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ポプレバイン パーベル
ポプレバイン パーベル
カーン ウメール
カーン ウメール
ジェームズ リン ヘニャン
ジェームズ リン ヘニャン
ジェイ フランクリン アンドリュー
ジェイ フランクリン アンドリュー
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National Semiconductor Corp
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National Semiconductor Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2012551964A 2010-02-02 2010-11-29 全nmos−4トランジスタ不揮発性メモリセルのプログラム方法 Active JP5649664B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/698,318 2010-02-02
US12/698,318 US8363469B1 (en) 2010-02-02 2010-02-02 All-NMOS 4-transistor non-volatile memory cell
PCT/US2010/058203 WO2011096977A2 (en) 2010-02-02 2010-11-29 All-nmos 4-transistor non-volatile memory cell

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JP2013519180A JP2013519180A (ja) 2013-05-23
JP2013519180A5 JP2013519180A5 (enExample) 2014-01-16
JP5649664B2 true JP5649664B2 (ja) 2015-01-07

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US (1) US8363469B1 (enExample)
JP (1) JP5649664B2 (enExample)
CN (1) CN102741825B (enExample)
TW (1) TWI449047B (enExample)
WO (1) WO2011096977A2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5556873B2 (ja) * 2012-10-19 2014-07-23 株式会社フローディア 不揮発性半導体記憶装置
CN103137201A (zh) * 2013-03-21 2013-06-05 苏州宽温电子科技有限公司 一种标准逻辑工艺兼容的差分架构nvm存储器单元
US8953380B1 (en) 2013-12-02 2015-02-10 Cypress Semiconductor Corporation Systems, methods, and apparatus for memory cells with common source lines
US9558804B2 (en) * 2014-07-23 2017-01-31 Namlab Ggmbh Charge storage ferroelectric memory hybrid and erase scheme
US9524785B2 (en) * 2015-04-01 2016-12-20 Ememory Technology Inc. Memory unit with voltage passing device

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7007A (en) * 1850-01-08 Improvement in machinery for making cotton cordage
US9026A (en) * 1852-06-15 Improvement in imitation stone
US6137723A (en) 1998-04-01 2000-10-24 National Semiconductor Corporation Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure
US6188594B1 (en) 1999-06-09 2001-02-13 Neomagic Corp. Reduced-pitch 6-transistor NMOS content-addressable-memory cell
US6434040B1 (en) 2001-02-23 2002-08-13 Silicon Access Networks Loadless NMOS four transistor SRAM cell
CN1292484C (zh) * 2002-07-31 2006-12-27 连邦科技股份有限公司 非易失性静态随机存取存储器存储单元
US6920061B2 (en) 2003-08-27 2005-07-19 International Business Machines Corporation Loadless NMOS four transistor dynamic dual Vt SRAM cell
US6903978B1 (en) 2003-09-17 2005-06-07 National Semiconductor Corporation Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage
US6985386B1 (en) * 2004-07-08 2006-01-10 National Semiconductor Corporation Programming method for nonvolatile memory cell
US6992927B1 (en) 2004-07-08 2006-01-31 National Semiconductor Corporation Nonvolatile memory cell
US7164606B1 (en) 2005-07-15 2007-01-16 National Semiconductor Corporation Reverse fowler-nordheim tunneling programming for non-volatile memory cell
CN1941203A (zh) * 2005-09-29 2007-04-04 松下电器产业株式会社 非易失性半导体存储装置
JP2007123830A (ja) * 2005-09-29 2007-05-17 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置
US7483310B1 (en) * 2006-11-02 2009-01-27 National Semiconductor Corporation System and method for providing high endurance low cost CMOS compatible EEPROM devices
US7453726B1 (en) 2007-01-23 2008-11-18 National Semiconductor Corporation Non-volatile memory cell with improved programming technique and density
JP5228195B2 (ja) * 2007-04-20 2013-07-03 インターチップ株式会社 不揮発性メモリ内蔵シフトレジスタ
JP5266443B2 (ja) * 2008-04-18 2013-08-21 インターチップ株式会社 不揮発性メモリセル及び不揮発性メモリセル内蔵データラッチ

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Publication number Publication date
WO2011096977A3 (en) 2011-09-29
TWI449047B (zh) 2014-08-11
WO2011096977A2 (en) 2011-08-11
US8363469B1 (en) 2013-01-29
CN102741825B (zh) 2015-05-20
TW201133489A (en) 2011-10-01
CN102741825A (zh) 2012-10-17
JP2013519180A (ja) 2013-05-23

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