JP5638205B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5638205B2 JP5638205B2 JP2009142973A JP2009142973A JP5638205B2 JP 5638205 B2 JP5638205 B2 JP 5638205B2 JP 2009142973 A JP2009142973 A JP 2009142973A JP 2009142973 A JP2009142973 A JP 2009142973A JP 5638205 B2 JP5638205 B2 JP 5638205B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- region
- substrate
- electrode pad
- conductive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/121—Arrangements for protection of devices protecting against mechanical damage
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
- H10W44/255—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for operation at multiple different frequencies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/934—Cross-sectional shape, i.e. in side view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009142973A JP5638205B2 (ja) | 2009-06-16 | 2009-06-16 | 半導体装置 |
| US12/801,076 US8310034B2 (en) | 2009-06-16 | 2010-05-20 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009142973A JP5638205B2 (ja) | 2009-06-16 | 2009-06-16 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011003570A JP2011003570A (ja) | 2011-01-06 |
| JP2011003570A5 JP2011003570A5 (https=) | 2012-06-14 |
| JP5638205B2 true JP5638205B2 (ja) | 2014-12-10 |
Family
ID=43305706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009142973A Active JP5638205B2 (ja) | 2009-06-16 | 2009-06-16 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8310034B2 (https=) |
| JP (1) | JP5638205B2 (https=) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8803326B2 (en) * | 2011-11-15 | 2014-08-12 | Xintec Inc. | Chip package |
| US20130328158A1 (en) * | 2012-06-11 | 2013-12-12 | Broadcom Corporation | Semiconductor seal ring design for noise isolation |
| US9245842B2 (en) * | 2012-11-29 | 2016-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices having guard ring structure and methods of manufacture thereof |
| US8970001B2 (en) * | 2012-12-28 | 2015-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Guard ring design for maintaining signal integrity |
| US20140340853A1 (en) * | 2013-05-14 | 2014-11-20 | Infineon Technologies Ag | Safety Device |
| JP6323643B2 (ja) * | 2013-11-07 | 2018-05-16 | セイコーエプソン株式会社 | 半導体回路装置、発振器、電子機器及び移動体 |
| WO2015145507A1 (ja) * | 2014-03-28 | 2015-10-01 | 株式会社ソシオネクスト | 半導体集積回路 |
| US9601354B2 (en) * | 2014-08-27 | 2017-03-21 | Nxp Usa, Inc. | Semiconductor manufacturing for forming bond pads and seal rings |
| US9881881B2 (en) | 2015-07-24 | 2018-01-30 | Qualcomm Incorporated | Conductive seal ring for power bus distribution |
| JP6679444B2 (ja) | 2016-08-12 | 2020-04-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| CN107146784B (zh) * | 2017-05-12 | 2021-01-26 | 京东方科技集团股份有限公司 | 阵列基板和包括其的嵌入式触摸显示面板 |
| KR102442933B1 (ko) * | 2017-08-21 | 2022-09-15 | 삼성전자주식회사 | 3차원 반도체 장치 |
| IT201700103511A1 (it) * | 2017-09-15 | 2019-03-15 | St Microelectronics Srl | Dispositivo microelettronico dotato di connessioni protette e relativo processo di fabbricazione |
| WO2019092938A1 (ja) * | 2017-11-13 | 2019-05-16 | オリンパス株式会社 | 半導体基板、半導体基板積層体および内視鏡 |
| CN113424312B (zh) * | 2019-02-08 | 2025-06-24 | ams国际有限公司 | 降低集成电路和传感器对射频干扰的敏感性 |
| US12506089B2 (en) * | 2022-06-03 | 2025-12-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structures with improved reliability |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01103859A (ja) | 1987-03-18 | 1989-04-20 | Nec Ic Microcomput Syst Ltd | 半導体集積回路装置 |
| JPH0430470A (ja) * | 1990-05-25 | 1992-02-03 | Nec Corp | 半導体集積回路 |
| JP2833568B2 (ja) * | 1996-02-28 | 1998-12-09 | 日本電気株式会社 | 半導体集積回路 |
| JP4502173B2 (ja) * | 2003-02-03 | 2010-07-14 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| JP4519418B2 (ja) | 2003-04-28 | 2010-08-04 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7851860B2 (en) | 2004-03-26 | 2010-12-14 | Honeywell International Inc. | Techniques to reduce substrate cross talk on mixed signal and RF circuit design |
| JP4689244B2 (ja) | 2004-11-16 | 2011-05-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7615841B2 (en) * | 2005-05-02 | 2009-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Design structure for coupling noise prevention |
| JP2007059676A (ja) * | 2005-08-25 | 2007-03-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JP2008071931A (ja) | 2006-09-14 | 2008-03-27 | Toshiba Corp | 半導体装置 |
| JP5147044B2 (ja) | 2007-01-16 | 2013-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2009
- 2009-06-16 JP JP2009142973A patent/JP5638205B2/ja active Active
-
2010
- 2010-05-20 US US12/801,076 patent/US8310034B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2011003570A (ja) | 2011-01-06 |
| US8310034B2 (en) | 2012-11-13 |
| US20100314727A1 (en) | 2010-12-16 |
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