CN100435305C - 使电子元件免于静电放电的保护组件的制造方法和相应构造的电子元件 - Google Patents
使电子元件免于静电放电的保护组件的制造方法和相应构造的电子元件 Download PDFInfo
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- CN100435305C CN100435305C CNB2006100739818A CN200610073981A CN100435305C CN 100435305 C CN100435305 C CN 100435305C CN B2006100739818 A CNB2006100739818 A CN B2006100739818A CN 200610073981 A CN200610073981 A CN 200610073981A CN 100435305 C CN100435305 C CN 100435305C
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- power voltage
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- electrical wiring
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- 230000003068 static effect Effects 0.000 title claims description 24
- 238000000034 method Methods 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000009429 electrical wiring Methods 0.000 claims description 31
- 230000000694 effects Effects 0.000 claims description 5
- 238000005538 encapsulation Methods 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 18
- 230000000644 propagated effect Effects 0.000 description 4
- 238000012546 transfer Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/665—Bias feed arrangements
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (18)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005014176.5 | 2005-03-29 | ||
DE102005014176A DE102005014176B4 (de) | 2005-03-29 | 2005-03-29 | Verfahren zum Erstellen einer Schutzanordnung zum Schutz eines Elektronikbausteins vor elektrostatischen Entladungen und entsprechend ausgebildeter Elektronikbaustein |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1855406A CN1855406A (zh) | 2006-11-01 |
CN100435305C true CN100435305C (zh) | 2008-11-19 |
Family
ID=36998765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100739818A Active CN100435305C (zh) | 2005-03-29 | 2006-03-29 | 使电子元件免于静电放电的保护组件的制造方法和相应构造的电子元件 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7542254B2 (zh) |
CN (1) | CN100435305C (zh) |
DE (1) | DE102005014176B4 (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8077439B2 (en) * | 2008-04-17 | 2011-12-13 | Broadcom Corporation | Method and system for mitigating risk of electrostatic discharge for a system on chip (SOC) |
CN106580188B (zh) * | 2017-01-25 | 2022-12-27 | 莱克电气股份有限公司 | 一种静电防护系统及使用该系统的手持式吸尘器 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1224240A (zh) * | 1998-01-20 | 1999-07-28 | 盛群半导体股份有限公司 | 解决集成电路静电放电问题的电路布局 |
JP2002093845A (ja) * | 2000-06-22 | 2002-03-29 | Texas Instruments Inc | ボンディング・ワイヤ・インダクタを備えたオンチップ信号フィルタ |
US6433985B1 (en) * | 1999-12-30 | 2002-08-13 | International Business Machines Corporation | ESD network with capacitor blocking element |
WO2004049536A1 (de) * | 2002-11-26 | 2004-06-10 | Infineon Technologies Ag | Schaltungsanordnung zum schutz integrierter schaltungen vor elektrostatischen entladungen |
CN1554141A (zh) * | 2001-09-06 | 2004-12-08 | �����ɷ� | 集成电路的静电放电保护布线 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5991135A (en) * | 1998-05-11 | 1999-11-23 | Vlsi Technology, Inc. | System including ESD protection |
DE19944489A1 (de) * | 1999-09-16 | 2001-04-19 | Infineon Technologies Ag | ESD-Schutzanordnung für Signaleingänge und -ausgänge bei Halbleitervorrichtungen mit Substrattrennung |
DE19944487B4 (de) * | 1999-09-16 | 2005-04-28 | Infineon Technologies Ag | ESD-Schutzanordnung für eine Halbleitervorrichtung |
JP3822768B2 (ja) * | 1999-12-03 | 2006-09-20 | 株式会社ルネサステクノロジ | Icカードの製造方法 |
US6624999B1 (en) * | 2001-11-20 | 2003-09-23 | Intel Corporation | Electrostatic discharge protection using inductors |
-
2005
- 2005-03-29 DE DE102005014176A patent/DE102005014176B4/de not_active Expired - Fee Related
-
2006
- 2006-03-29 CN CNB2006100739818A patent/CN100435305C/zh active Active
- 2006-03-29 US US11/392,216 patent/US7542254B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1224240A (zh) * | 1998-01-20 | 1999-07-28 | 盛群半导体股份有限公司 | 解决集成电路静电放电问题的电路布局 |
US6433985B1 (en) * | 1999-12-30 | 2002-08-13 | International Business Machines Corporation | ESD network with capacitor blocking element |
JP2002093845A (ja) * | 2000-06-22 | 2002-03-29 | Texas Instruments Inc | ボンディング・ワイヤ・インダクタを備えたオンチップ信号フィルタ |
CN1554141A (zh) * | 2001-09-06 | 2004-12-08 | �����ɷ� | 集成电路的静电放电保护布线 |
WO2004049536A1 (de) * | 2002-11-26 | 2004-06-10 | Infineon Technologies Ag | Schaltungsanordnung zum schutz integrierter schaltungen vor elektrostatischen entladungen |
Also Published As
Publication number | Publication date |
---|---|
DE102005014176A1 (de) | 2006-10-05 |
CN1855406A (zh) | 2006-11-01 |
US7542254B2 (en) | 2009-06-02 |
US20060268488A1 (en) | 2006-11-30 |
DE102005014176B4 (de) | 2009-08-20 |
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Owner name: INFINEON TECHNOLOGIES WIRELESS COMMUNICATION SOLUT Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG Effective date: 20110422 Owner name: LANTIQ DEUTSCHLAND GMBH Free format text: FORMER OWNER: INFINEON TECHNOLOGIES WIRELESS COMMUNICATION SOLUTIONS AG Effective date: 20110422 |
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Address after: German Neubiberg Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: Infineon Technologies AG |
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Effective date of registration: 20110422 Address after: German Neubiberg Patentee after: Lantiq Deutschland GmbH Address before: German Neubiberg Patentee before: Infineon Technologies Wireless Solutions Ltd. Effective date of registration: 20110422 Address after: German Neubiberg Patentee after: Infineon Technologies Wireless Solutions Ltd. Address before: German Neubiberg Patentee before: Infineon Technologies AG |
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