DE19944487B4 - ESD-Schutzanordnung für eine Halbleitervorrichtung - Google Patents

ESD-Schutzanordnung für eine Halbleitervorrichtung Download PDF

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Publication number
DE19944487B4
DE19944487B4 DE19944487A DE19944487A DE19944487B4 DE 19944487 B4 DE19944487 B4 DE 19944487B4 DE 19944487 A DE19944487 A DE 19944487A DE 19944487 A DE19944487 A DE 19944487A DE 19944487 B4 DE19944487 B4 DE 19944487B4
Authority
DE
Germany
Prior art keywords
semiconductor device
esd protection
protection arrangement
arrangement
esd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE19944487A
Other languages
English (en)
Other versions
DE19944487A1 (de
Inventor
Harald Gosner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE19944487A priority Critical patent/DE19944487B4/de
Priority to PCT/DE2000/003253 priority patent/WO2001020679A1/de
Publication of DE19944487A1 publication Critical patent/DE19944487A1/de
Application granted granted Critical
Publication of DE19944487B4 publication Critical patent/DE19944487B4/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
DE19944487A 1999-09-16 1999-09-16 ESD-Schutzanordnung für eine Halbleitervorrichtung Expired - Lifetime DE19944487B4 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19944487A DE19944487B4 (de) 1999-09-16 1999-09-16 ESD-Schutzanordnung für eine Halbleitervorrichtung
PCT/DE2000/003253 WO2001020679A1 (de) 1999-09-16 2000-09-15 Esd-schutzanordnung für halbleitervorrichtung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19944487A DE19944487B4 (de) 1999-09-16 1999-09-16 ESD-Schutzanordnung für eine Halbleitervorrichtung

Publications (2)

Publication Number Publication Date
DE19944487A1 DE19944487A1 (de) 2001-04-19
DE19944487B4 true DE19944487B4 (de) 2005-04-28

Family

ID=7922292

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19944487A Expired - Lifetime DE19944487B4 (de) 1999-09-16 1999-09-16 ESD-Schutzanordnung für eine Halbleitervorrichtung

Country Status (2)

Country Link
DE (1) DE19944487B4 (de)
WO (1) WO2001020679A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004007655B8 (de) * 2004-02-17 2013-10-10 Infineon Technologies Ag Halbleiterschaltungen mit ESD-Schutzvorrichtung mit einer mit einem Substrat- oder Guard-Ring-Kontakt kontaktierten ESD-Schutzschaltung
DE102004031455B4 (de) * 2004-06-29 2014-10-30 Infineon Technologies Ag Verfahren zur Erstellung eines ESD-Schutzes bei einem mikroelektronischen Baustein und entsprechend ausgebildeter mikroelektronischer Baustein
DE102005014176B4 (de) 2005-03-29 2009-08-20 Infineon Technologies Ag Verfahren zum Erstellen einer Schutzanordnung zum Schutz eines Elektronikbausteins vor elektrostatischen Entladungen und entsprechend ausgebildeter Elektronikbaustein

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19743240C1 (de) * 1997-09-30 1999-04-01 Siemens Ag Integrierte Halbleiterschaltung mit Schutzstruktur zum Schutz vor elektrostatischer Entladung
DE19743344C2 (de) * 1997-09-30 1999-08-05 Siemens Ag Verfahren zur Montage integrierter Schaltkreise mit Schutz der Schaltkreise vor elektrostatischer Entladung und entsprechende Anordnung von integrierten Schaltkreisen mit Schutz vor elektrostatischer Entladung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4408245A (en) * 1981-12-28 1983-10-04 Rca Corporation Protection and anti-floating network for insulated-gate field-effect circuitry
KR960002094B1 (ko) * 1990-11-30 1996-02-10 가부시키가이샤 도시바 입력보호회로를 갖춘 반도체장치
US5446302A (en) * 1993-12-14 1995-08-29 Analog Devices, Incorporated Integrated circuit with diode-connected transistor for reducing ESD damage
US5477078A (en) * 1994-02-18 1995-12-19 Analog Devices, Incorporated Integrated circuit (IC) with a two-terminal diode device to protect metal-oxide-metal capacitors from ESD damage
US5940258A (en) * 1996-02-29 1999-08-17 Texas Instruments Incorporated Semiconductor ESD protection circuit
DE19743230C1 (de) * 1997-09-30 1999-04-15 Siemens Ag Integrierte Halbleiterschaltung mit Schutzstruktur zum Schutz vor elektrostatischer Entladung
JP3450297B2 (ja) * 1997-09-30 2003-09-22 インフィネオン テクノロジース アクチエンゲゼルシャフト 静電放電に対して保護するための保護構造体を備えた集積半導体回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19743240C1 (de) * 1997-09-30 1999-04-01 Siemens Ag Integrierte Halbleiterschaltung mit Schutzstruktur zum Schutz vor elektrostatischer Entladung
DE19743344C2 (de) * 1997-09-30 1999-08-05 Siemens Ag Verfahren zur Montage integrierter Schaltkreise mit Schutz der Schaltkreise vor elektrostatischer Entladung und entsprechende Anordnung von integrierten Schaltkreisen mit Schutz vor elektrostatischer Entladung

Also Published As

Publication number Publication date
DE19944487A1 (de) 2001-04-19
WO2001020679A1 (de) 2001-03-22

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Legal Events

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OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R071 Expiry of right