JP5638205B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5638205B2
JP5638205B2 JP2009142973A JP2009142973A JP5638205B2 JP 5638205 B2 JP5638205 B2 JP 5638205B2 JP 2009142973 A JP2009142973 A JP 2009142973A JP 2009142973 A JP2009142973 A JP 2009142973A JP 5638205 B2 JP5638205 B2 JP 5638205B2
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Japan
Prior art keywords
semiconductor device
region
substrate
electrode pad
conductive film
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JP2009142973A
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Japanese (ja)
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JP2011003570A (ja
JP2011003570A5 (enExample
Inventor
慎一 内田
慎一 内田
隆介 橋本
隆介 橋本
冨留宮 正之
正之 冨留宮
公夫 細木
公夫 細木
英雄 大庭
英雄 大庭
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to JP2009142973A priority Critical patent/JP5638205B2/ja
Priority to US12/801,076 priority patent/US8310034B2/en
Publication of JP2011003570A publication Critical patent/JP2011003570A/ja
Publication of JP2011003570A5 publication Critical patent/JP2011003570A5/ja
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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JP2009142973A 2009-06-16 2009-06-16 半導体装置 Active JP5638205B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009142973A JP5638205B2 (ja) 2009-06-16 2009-06-16 半導体装置
US12/801,076 US8310034B2 (en) 2009-06-16 2010-05-20 Semiconductor device

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JP2009142973A JP5638205B2 (ja) 2009-06-16 2009-06-16 半導体装置

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JP2011003570A JP2011003570A (ja) 2011-01-06
JP2011003570A5 JP2011003570A5 (enExample) 2012-06-14
JP5638205B2 true JP5638205B2 (ja) 2014-12-10

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Families Citing this family (16)

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CN103107153B (zh) * 2011-11-15 2016-04-06 精材科技股份有限公司 晶片封装体及其形成方法
US20130328158A1 (en) * 2012-06-11 2013-12-12 Broadcom Corporation Semiconductor seal ring design for noise isolation
US9245842B2 (en) * 2012-11-29 2016-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices having guard ring structure and methods of manufacture thereof
US8970001B2 (en) * 2012-12-28 2015-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Guard ring design for maintaining signal integrity
US20140340853A1 (en) * 2013-05-14 2014-11-20 Infineon Technologies Ag Safety Device
JP6323643B2 (ja) * 2013-11-07 2018-05-16 セイコーエプソン株式会社 半導体回路装置、発振器、電子機器及び移動体
WO2015145507A1 (ja) * 2014-03-28 2015-10-01 株式会社ソシオネクスト 半導体集積回路
US9601354B2 (en) * 2014-08-27 2017-03-21 Nxp Usa, Inc. Semiconductor manufacturing for forming bond pads and seal rings
US9881881B2 (en) * 2015-07-24 2018-01-30 Qualcomm Incorporated Conductive seal ring for power bus distribution
JP6679444B2 (ja) * 2016-08-12 2020-04-15 ルネサスエレクトロニクス株式会社 半導体装置
CN107146784B (zh) * 2017-05-12 2021-01-26 京东方科技集团股份有限公司 阵列基板和包括其的嵌入式触摸显示面板
KR102442933B1 (ko) * 2017-08-21 2022-09-15 삼성전자주식회사 3차원 반도체 장치
IT201700103511A1 (it) * 2017-09-15 2019-03-15 St Microelectronics Srl Dispositivo microelettronico dotato di connessioni protette e relativo processo di fabbricazione
WO2019092938A1 (ja) * 2017-11-13 2019-05-16 オリンパス株式会社 半導体基板、半導体基板積層体および内視鏡
WO2020161080A1 (en) * 2019-02-08 2020-08-13 Ams International Ag Reducing susceptibility of integrated circuits and sensors to radio frequency interference
US20230395531A1 (en) * 2022-06-03 2023-12-07 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor Structures With Improved Reliability

Family Cites Families (11)

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JPH01103859A (ja) 1987-03-18 1989-04-20 Nec Ic Microcomput Syst Ltd 半導体集積回路装置
JPH0430470A (ja) * 1990-05-25 1992-02-03 Nec Corp 半導体集積回路
JP2833568B2 (ja) * 1996-02-28 1998-12-09 日本電気株式会社 半導体集積回路
JP4502173B2 (ja) * 2003-02-03 2010-07-14 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
JP4519418B2 (ja) 2003-04-28 2010-08-04 ルネサスエレクトロニクス株式会社 半導体装置
US7851860B2 (en) 2004-03-26 2010-12-14 Honeywell International Inc. Techniques to reduce substrate cross talk on mixed signal and RF circuit design
JP4689244B2 (ja) 2004-11-16 2011-05-25 ルネサスエレクトロニクス株式会社 半導体装置
US7615841B2 (en) * 2005-05-02 2009-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Design structure for coupling noise prevention
JP2007059676A (ja) * 2005-08-25 2007-03-08 Matsushita Electric Ind Co Ltd 半導体装置
JP2008071931A (ja) 2006-09-14 2008-03-27 Toshiba Corp 半導体装置
JP5147044B2 (ja) 2007-01-16 2013-02-20 ルネサスエレクトロニクス株式会社 半導体装置

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