JP5632269B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5632269B2
JP5632269B2 JP2010264147A JP2010264147A JP5632269B2 JP 5632269 B2 JP5632269 B2 JP 5632269B2 JP 2010264147 A JP2010264147 A JP 2010264147A JP 2010264147 A JP2010264147 A JP 2010264147A JP 5632269 B2 JP5632269 B2 JP 5632269B2
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Japan
Prior art keywords
read
write
memory cell
data
banks
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Expired - Fee Related
Application number
JP2010264147A
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English (en)
Japanese (ja)
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JP2012113792A5 (enExample
JP2012113792A (ja
Inventor
藤澤　宏樹
宏樹 藤澤
裕二 元山
裕二 元山
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PS4 Luxco SARL
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PS4 Luxco SARL
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Publication date
Application filed by PS4 Luxco SARL filed Critical PS4 Luxco SARL
Priority to JP2010264147A priority Critical patent/JP5632269B2/ja
Priority to US13/304,062 priority patent/US8630129B2/en
Publication of JP2012113792A publication Critical patent/JP2012113792A/ja
Publication of JP2012113792A5 publication Critical patent/JP2012113792A5/ja
Application granted granted Critical
Publication of JP5632269B2 publication Critical patent/JP5632269B2/ja
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
JP2010264147A 2010-11-26 2010-11-26 半導体装置 Expired - Fee Related JP5632269B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010264147A JP5632269B2 (ja) 2010-11-26 2010-11-26 半導体装置
US13/304,062 US8630129B2 (en) 2010-11-26 2011-11-23 Semiconductor device having plural banks

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010264147A JP5632269B2 (ja) 2010-11-26 2010-11-26 半導体装置

Publications (3)

Publication Number Publication Date
JP2012113792A JP2012113792A (ja) 2012-06-14
JP2012113792A5 JP2012113792A5 (enExample) 2014-01-09
JP5632269B2 true JP5632269B2 (ja) 2014-11-26

Family

ID=46126582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010264147A Expired - Fee Related JP5632269B2 (ja) 2010-11-26 2010-11-26 半導体装置

Country Status (2)

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US (1) US8630129B2 (enExample)
JP (1) JP5632269B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120028146A (ko) * 2010-09-14 2012-03-22 삼성전자주식회사 입출력 경로 스왑을 지원하는 메모리 시스템
KR20130139066A (ko) * 2012-06-12 2013-12-20 삼성전자주식회사 소스라인 전압 발생기를 포함하는 자기 저항 메모리 장치
KR20140026180A (ko) * 2012-08-24 2014-03-05 에스케이하이닉스 주식회사 온 다이 터미네이션 회로
US8885777B1 (en) * 2012-10-24 2014-11-11 L-3 Communications Corp Digital signal processing apparatus with a delay memory having a plurality of memory cells and process for using same
KR102163544B1 (ko) * 2013-12-04 2020-10-08 에스케이하이닉스 주식회사 뱅크 구조를 갖는 반도체 메모리 장치
TWI639159B (zh) * 2015-05-28 2018-10-21 東芝記憶體股份有限公司 Semiconductor device
KR20170060739A (ko) * 2015-11-25 2017-06-02 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
KR102702035B1 (ko) 2019-11-21 2024-09-03 주식회사 메타씨앤아이 메모리 장치
US11599484B2 (en) * 2020-12-01 2023-03-07 Micron Technology, Inc. Semiconductor device having plural signal buses for multiple purposes
CN116543804B (zh) * 2023-07-07 2023-11-24 长鑫存储技术有限公司 驱动控制电路和存储器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0973782A (ja) * 1995-09-07 1997-03-18 Fujitsu Ltd 半導体記憶装置
KR100382739B1 (ko) * 2001-04-13 2003-05-09 삼성전자주식회사 비대칭 데이터 경로를 갖는 반도체 메모리 장치
DE10123769C1 (de) * 2001-05-16 2002-12-12 Infineon Technologies Ag Verfahren zur Anpassung unterschiedlicher Signallaufzeiten zwischen einer Steuerung und wenigstens zweier Verarbeitungseinheiten sowie Rechnersystem
JP4600825B2 (ja) * 2005-09-16 2010-12-22 エルピーダメモリ株式会社 半導体記憶装置
KR100943140B1 (ko) * 2006-11-14 2010-02-18 주식회사 하이닉스반도체 글로벌 입출력 라인의 제어장치 및 제어방법
JP5420827B2 (ja) 2007-07-04 2014-02-19 ピーエスフォー ルクスコ エスエイアールエル アドレスカウンタ及びこれを有する半導体記憶装置、並びに、データ処理システム
US7990798B2 (en) * 2007-10-15 2011-08-02 Qimonda Ag Integrated circuit including a memory module having a plurality of memory banks
JP5412032B2 (ja) * 2007-10-26 2014-02-12 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置
KR100929826B1 (ko) * 2008-06-04 2009-12-07 주식회사 하이닉스반도체 반도체 메모리 소자
US20100070676A1 (en) * 2008-09-12 2010-03-18 Qimonda North America Corporation Memory Data Bus Placement and Control
JP2010262700A (ja) * 2009-05-07 2010-11-18 Elpida Memory Inc 半導体装置
JP5314612B2 (ja) * 2010-02-04 2013-10-16 ルネサスエレクトロニクス株式会社 半導体記憶装置
US8305834B2 (en) * 2010-02-23 2012-11-06 Qimonda Ag Semiconductor memory with memory cell portions having different access speeds

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Publication number Publication date
US8630129B2 (en) 2014-01-14
US20120134217A1 (en) 2012-05-31
JP2012113792A (ja) 2012-06-14

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