JP5609085B2 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
JP5609085B2
JP5609085B2 JP2009275861A JP2009275861A JP5609085B2 JP 5609085 B2 JP5609085 B2 JP 5609085B2 JP 2009275861 A JP2009275861 A JP 2009275861A JP 2009275861 A JP2009275861 A JP 2009275861A JP 5609085 B2 JP5609085 B2 JP 5609085B2
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Prior art keywords
semiconductor device
wiring layer
columnar conductors
substrate
columnar
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JP2009275861A
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Japanese (ja)
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JP2011119481A (ja
JP2011119481A5 (https=
Inventor
昌宏 春原
昌宏 春原
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2009275861A priority Critical patent/JP5609085B2/ja
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Publication of JP2011119481A5 publication Critical patent/JP2011119481A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009275861A 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法 Active JP5609085B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009275861A JP5609085B2 (ja) 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009275861A JP5609085B2 (ja) 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法

Publications (3)

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JP2011119481A JP2011119481A (ja) 2011-06-16
JP2011119481A5 JP2011119481A5 (https=) 2012-12-13
JP5609085B2 true JP5609085B2 (ja) 2014-10-22

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JP (1) JP5609085B2 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8963339B2 (en) * 2012-10-08 2015-02-24 Qualcomm Incorporated Stacked multi-chip integrated circuit package
JP6112857B2 (ja) * 2012-12-25 2017-04-12 新光電気工業株式会社 配線基板及びその製造方法
JP6364762B2 (ja) * 2013-12-19 2018-08-01 富士通株式会社 電子デバイスの製造方法
JP6191728B2 (ja) * 2015-08-10 2017-09-06 大日本印刷株式会社 イメージセンサモジュール
WO2017026317A1 (ja) * 2015-08-10 2017-02-16 大日本印刷株式会社 イメージセンサモジュール

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270721A (ja) * 2001-03-12 2002-09-20 Fujitsu Ltd 半導体装置及びその製造方法
JP2004071719A (ja) * 2002-08-02 2004-03-04 Sony Corp インターポーザおよびその製造方法、並びに電子回路装置およびその製造方法
JP2004079745A (ja) * 2002-08-16 2004-03-11 Sony Corp インターポーザおよびその製造方法、並びに電子回路装置およびその製造方法
JP2004281982A (ja) * 2003-03-19 2004-10-07 Seiko Epson Corp 半導体装置及びその製造方法
JP4863857B2 (ja) * 2006-12-11 2012-01-25 日本インター株式会社 半導体モジュールおよび半導体装置の製造方法
JP2009164262A (ja) * 2007-12-28 2009-07-23 Seiko Epson Corp 半導体装置および電子機器

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JP2011119481A (ja) 2011-06-16

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