JP5584876B2 - 磁気センサ - Google Patents
磁気センサ Download PDFInfo
- Publication number
- JP5584876B2 JP5584876B2 JP2009099271A JP2009099271A JP5584876B2 JP 5584876 B2 JP5584876 B2 JP 5584876B2 JP 2009099271 A JP2009099271 A JP 2009099271A JP 2009099271 A JP2009099271 A JP 2009099271A JP 5584876 B2 JP5584876 B2 JP 5584876B2
- Authority
- JP
- Japan
- Prior art keywords
- signal processing
- processing circuit
- magnetic sensor
- layer
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Measuring Magnetic Variables (AREA)
Description
2 信号処理回路
3〜5 リードフレーム
6〜16 端子
17〜23 ワイヤ
30 モールド樹脂
31、33 保護膜
32 シールド層
34 絶縁層
35 p型分離層
36 導電性接合剤
38〜40、46〜48、54〜56 電極
41、43,49、57、77,80 n+型拡散層
42、50、51、58 p型拡散層
44、52、59 n−エピタキシャル層
45、53、60 n+型埋込層
61 npnトランジスタ
62 pnpトランジスタ
63 抵抗
70、81 電界
71、82 リーク電流
72、83 p反転領域
100 磁気センサ
Claims (2)
- 磁気センサ部と、
前記磁気センサ部が出力した信号を処理するバイポーラ構造で構成された信号処理回路と
を備える磁気センサにおいて、
前記信号処理回路は、n型シリコン基板に形成されており、
負の電源電圧に接続されたシールド層が前記信号処理回路の全面を覆うように設けられていることを特徴とする磁気センサ。 - 前記磁気センサ部は、化合物半導体で構成されたホール素子であることを特徴とする請求項1記載の磁気センサ。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009099271A JP5584876B2 (ja) | 2009-04-15 | 2009-04-15 | 磁気センサ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009099271A JP5584876B2 (ja) | 2009-04-15 | 2009-04-15 | 磁気センサ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010249655A JP2010249655A (ja) | 2010-11-04 |
JP5584876B2 true JP5584876B2 (ja) | 2014-09-10 |
Family
ID=43312159
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009099271A Expired - Fee Related JP5584876B2 (ja) | 2009-04-15 | 2009-04-15 | 磁気センサ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5584876B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5795383B2 (ja) * | 2011-10-31 | 2015-10-14 | 旭化成エレクトロニクス株式会社 | 磁気センサ |
JP6144505B2 (ja) * | 2013-02-21 | 2017-06-07 | 旭化成エレクトロニクス株式会社 | 磁気センサ装置 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5892745U (ja) * | 1981-12-16 | 1983-06-23 | 株式会社山武 | 半導体圧力変換器 |
JPH0335552A (ja) * | 1989-06-30 | 1991-02-15 | Nec Kansai Ltd | 高耐圧半導体装置 |
JPH0468576A (ja) * | 1990-07-09 | 1992-03-04 | Mitsubishi Electric Corp | 半導体装置 |
JPH07209019A (ja) * | 1994-01-25 | 1995-08-11 | Matsushita Electric Ind Co Ltd | 磁気式エンコーダ |
JP3360038B2 (ja) * | 1999-04-27 | 2002-12-24 | エヌイーシーマイクロシステム株式会社 | 半導体装置 |
JP2002076286A (ja) * | 2000-09-05 | 2002-03-15 | Matsushita Electric Ind Co Ltd | 金属酸化物型半導体装置 |
JP2004207477A (ja) * | 2002-12-25 | 2004-07-22 | Sanken Electric Co Ltd | ホール素子を有する半導体装置 |
-
2009
- 2009-04-15 JP JP2009099271A patent/JP5584876B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2010249655A (ja) | 2010-11-04 |
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